mem.isa (6739:48d10ba361c9) mem.isa (7045:e21fe6a62b1c)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2005 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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270
271 if (fault == NoFault) {
272 %(memacc_code)s;
273 }
274
275 if (fault == NoFault) {
276 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
277 memAccessFlags, NULL);
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2005 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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270
271 if (fault == NoFault) {
272 %(memacc_code)s;
273 }
274
275 if (fault == NoFault) {
276 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
277 memAccessFlags, NULL);
278 if (traceData) { traceData->setData(Mem); }
279 }
280
281 if (fault == NoFault) {
282 %(postacc_code)s;
283 }
284
285 if (fault == NoFault) {
286 %(op_wb)s;

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305
306 if (fault == NoFault) {
307 %(memacc_code)s;
308 }
309
310 if (fault == NoFault) {
311 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
312 memAccessFlags, &write_result);
278 }
279
280 if (fault == NoFault) {
281 %(postacc_code)s;
282 }
283
284 if (fault == NoFault) {
285 %(op_wb)s;

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304
305 if (fault == NoFault) {
306 %(memacc_code)s;
307 }
308
309 if (fault == NoFault) {
310 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
311 memAccessFlags, &write_result);
313 if (traceData) { traceData->setData(Mem); }
314 }
315
316 if (fault == NoFault) {
317 %(postacc_code)s;
318 }
319
320 if (fault == NoFault) {
321 %(op_wb)s;

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339
340 if (fault == NoFault) {
341 %(memacc_code)s;
342 }
343
344 if (fault == NoFault) {
345 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
346 memAccessFlags, NULL);
312 }
313
314 if (fault == NoFault) {
315 %(postacc_code)s;
316 }
317
318 if (fault == NoFault) {
319 %(op_wb)s;

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337
338 if (fault == NoFault) {
339 %(memacc_code)s;
340 }
341
342 if (fault == NoFault) {
343 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
344 memAccessFlags, NULL);
347 if (traceData) { traceData->setData(Mem); }
348 }
349
350 return fault;
351 }
352}};
353
354
355def template StoreCompleteAcc {{

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473let {{
474def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
475 postacc_code = '', base_class = 'MemoryDisp32',
476 decode_template = BasicDecode, exec_template_base = ''):
477 # Make sure flags are in lists (convert to lists if not).
478 mem_flags = makeList(mem_flags)
479 inst_flags = makeList(inst_flags)
480
345 }
346
347 return fault;
348 }
349}};
350
351
352def template StoreCompleteAcc {{

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470let {{
471def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
472 postacc_code = '', base_class = 'MemoryDisp32',
473 decode_template = BasicDecode, exec_template_base = ''):
474 # Make sure flags are in lists (convert to lists if not).
475 mem_flags = makeList(mem_flags)
476 inst_flags = makeList(inst_flags)
477
481 # add hook to get effective addresses into execution trace output.
482 ea_code += '\nif (traceData) { traceData->setAddr(EA); }\n'
483
484 # Some CPU models execute the memory operation as an atomic unit,
485 # while others want to separate them into an effective address
486 # computation and a memory access operation. As a result, we need
487 # to generate three StaticInst objects. Note that the latter two
488 # are nested inside the larger "atomic" one.
489
490 # Generate InstObjParams for each of the three objects. Note that
491 # they differ only in the set of code objects contained (which in

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478 # Some CPU models execute the memory operation as an atomic unit,
479 # while others want to separate them into an effective address
480 # computation and a memory access operation. As a result, we need
481 # to generate three StaticInst objects. Note that the latter two
482 # are nested inside the larger "atomic" one.
483
484 # Generate InstObjParams for each of the three objects. Note that
485 # they differ only in the set of code objects contained (which in

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