mem.isa (6185:9925b3e83e06) mem.isa (6192:6cd5f0282d8a)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2005 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

--- 39 unchanged lines hidden (view full) ---

48 /// Constructor
49 Memory(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
50 : AlphaStaticInst(mnem, _machInst, __opClass)
51 {
52 }
53
54 std::string
55 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2005 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

--- 39 unchanged lines hidden (view full) ---

48 /// Constructor
49 Memory(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
50 : AlphaStaticInst(mnem, _machInst, __opClass)
51 {
52 }
53
54 std::string
55 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
56
57 public:
58
59 Request::Flags memAccFlags() { return memAccessFlags; }
60 };
61
62 /**
63 * Base class for memory-format instructions using a 32-bit
64 * displacement (i.e. most of them).
65 */
66 class MemoryDisp32 : public Memory
67 {

--- 67 unchanged lines hidden (view full) ---

135
136 %(BasicExecDeclare)s
137
138 %(EACompDeclare)s
139
140 %(InitiateAccDeclare)s
141
142 %(CompleteAccDeclare)s
56 };
57
58 /**
59 * Base class for memory-format instructions using a 32-bit
60 * displacement (i.e. most of them).
61 */
62 class MemoryDisp32 : public Memory
63 {

--- 67 unchanged lines hidden (view full) ---

131
132 %(BasicExecDeclare)s
133
134 %(EACompDeclare)s
135
136 %(InitiateAccDeclare)s
137
138 %(CompleteAccDeclare)s
143
144 %(MemAccSizeDeclare)s
145 };
146}};
147
148
149def template EACompDeclare {{
150 Fault eaComp(%(CPU_exec_context)s *, Trace::InstRecord *) const;
151}};
152
153def template InitiateAccDeclare {{
154 Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
155}};
156
157
158def template CompleteAccDeclare {{
159 Fault completeAcc(PacketPtr, %(CPU_exec_context)s *,
160 Trace::InstRecord *) const;
161}};
162
139 };
140}};
141
142
143def template EACompDeclare {{
144 Fault eaComp(%(CPU_exec_context)s *, Trace::InstRecord *) const;
145}};
146
147def template InitiateAccDeclare {{
148 Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
149}};
150
151
152def template CompleteAccDeclare {{
153 Fault completeAcc(PacketPtr, %(CPU_exec_context)s *,
154 Trace::InstRecord *) const;
155}};
156
163def template MemAccSizeDeclare {{
164 int memAccSize(%(CPU_exec_context)s *xc);
165}};
166
167def template LoadStoreMemAccSize {{
168 int %(class_name)s::memAccSize(%(CPU_exec_context)s *xc)
169 {
170 // Return the memory access size in bytes
171 return (%(mem_acc_size)d / 8);
172 }
173}};
174
175
176def template LoadStoreConstructor {{
177 inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
178 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
179 {
180 %(constructor)s;
181 }
182}};
183

--- 273 unchanged lines hidden (view full) ---

457 {
458 warn("completeAcc undefined: Misc instruction does not support split "
459 "access method!");
460
461 return NoFault;
462 }
463}};
464
157def template LoadStoreConstructor {{
158 inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
159 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
160 {
161 %(constructor)s;
162 }
163}};
164

--- 273 unchanged lines hidden (view full) ---

438 {
439 warn("completeAcc undefined: Misc instruction does not support split "
440 "access method!");
441
442 return NoFault;
443 }
444}};
445
465def template MiscMemAccSize {{
466 int %(class_name)s::memAccSize(%(CPU_exec_context)s *xc)
467 {
468 return (%(mem_acc_size)d / 8);
469 panic("memAccSize undefined: Misc instruction does not support split "
470 "access method!");
471 return 0;
472 }
473}};
474
475// load instructions use Ra as dest, so check for
476// Ra == 31 to detect nops
477def template LoadNopCheckDecode {{
478 {
479 AlphaStaticInst *i = new %(class_name)s(machInst);
480 if (RA == 31) {
481 i = makeNop(i);

--- 54 unchanged lines hidden (view full) ---

536 # The InitiateAcc template is the same for StoreCond templates as the
537 # corresponding Store template..
538 StoreCondInitiateAcc = StoreInitiateAcc
539
540 fullExecTemplate = eval(exec_template_base + 'Execute')
541 initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
542 completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
543
446
447// load instructions use Ra as dest, so check for
448// Ra == 31 to detect nops
449def template LoadNopCheckDecode {{
450 {
451 AlphaStaticInst *i = new %(class_name)s(machInst);
452 if (RA == 31) {
453 i = makeNop(i);

--- 54 unchanged lines hidden (view full) ---

508 # The InitiateAcc template is the same for StoreCond templates as the
509 # corresponding Store template..
510 StoreCondInitiateAcc = StoreInitiateAcc
511
512 fullExecTemplate = eval(exec_template_base + 'Execute')
513 initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
514 completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
515
544 if (exec_template_base == 'Load' or exec_template_base == 'Store'):
545 memAccSizeTemplate = eval('LoadStoreMemAccSize')
546 else:
547 memAccSizeTemplate = eval('MiscMemAccSize')
548
549 # (header_output, decoder_output, decode_block, exec_output)
550 return (LoadStoreDeclare.subst(iop),
551 LoadStoreConstructor.subst(iop),
552 decode_template.subst(iop),
553 fullExecTemplate.subst(iop)
554 + EACompExecute.subst(iop)
555 + initiateAccTemplate.subst(iop)
516 # (header_output, decoder_output, decode_block, exec_output)
517 return (LoadStoreDeclare.subst(iop),
518 LoadStoreConstructor.subst(iop),
519 decode_template.subst(iop),
520 fullExecTemplate.subst(iop)
521 + EACompExecute.subst(iop)
522 + initiateAccTemplate.subst(iop)
556 + completeAccTemplate.subst(iop)
557 + memAccSizeTemplate.subst(memacc_iop))
523 + completeAccTemplate.subst(iop))
558}};
559
560def format LoadOrNop(memacc_code, ea_code = {{ EA = Rb + disp; }},
561 mem_flags = [], inst_flags = []) {{
562 (header_output, decoder_output, decode_block, exec_output) = \
563 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
564 decode_template = LoadNopCheckDecode,
565 exec_template_base = 'Load')

--- 60 unchanged lines hidden --- 		524}};
525
526def format LoadOrNop(memacc_code, ea_code = {{ EA = Rb + disp; }},
527 mem_flags = [], inst_flags = []) {{
528 (header_output, decoder_output, decode_block, exec_output) = \
529 LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
530 decode_template = LoadNopCheckDecode,
531 exec_template_base = 'Load')

--- 60 unchanged lines hidden ---