mem.isa (6179:83693f4b79fd) mem.isa (6181:19fedb1e5ded)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2005 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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39 * Base class for general Alpha memory-format instructions.
40 */
41 class Memory : public AlphaStaticInst
42 {
43 protected:
44
45 /// Memory request flags. See mem_req_base.hh.
46 Request::Flags memAccessFlags;
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2005 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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39 * Base class for general Alpha memory-format instructions.
40 */
41 class Memory : public AlphaStaticInst
42 {
43 protected:
44
45 /// Memory request flags. See mem_req_base.hh.
46 Request::Flags memAccessFlags;
47 /// Pointer to EAComp object.
48 const StaticInstPtr eaCompPtr;
49 /// Pointer to MemAcc object.
50 const StaticInstPtr memAccPtr;
51
52 /// Constructor
47
48 /// Constructor
53 Memory(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
54 StaticInstPtr _eaCompPtr = nullStaticInstPtr,
55 StaticInstPtr _memAccPtr = nullStaticInstPtr)
56 : AlphaStaticInst(mnem, _machInst, __opClass),
57 eaCompPtr(_eaCompPtr), memAccPtr(_memAccPtr)
49 Memory(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
50 : AlphaStaticInst(mnem, _machInst, __opClass)
58 {
59 }
60
61 std::string
62 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
63
51 {
52 }
53
54 std::string
55 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
56
64 public:
57 public:
65
58
66 const StaticInstPtr &eaCompInst() const { return eaCompPtr; }
67 const StaticInstPtr &memAccInst() const { return memAccPtr; }
68
69 Request::Flags memAccFlags() { return memAccessFlags; }
70 };
71
72 /**
73 * Base class for memory-format instructions using a 32-bit
74 * displacement (i.e. most of them).
75 */
76 class MemoryDisp32 : public Memory
77 {
78 protected:
79 /// Displacement for EA calculation (signed).
80 int32_t disp;
81
82 /// Constructor.
59 Request::Flags memAccFlags() { return memAccessFlags; }
60 };
61
62 /**
63 * Base class for memory-format instructions using a 32-bit
64 * displacement (i.e. most of them).
65 */
66 class MemoryDisp32 : public Memory
67 {
68 protected:
69 /// Displacement for EA calculation (signed).
70 int32_t disp;
71
72 /// Constructor.
83 MemoryDisp32(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
84 StaticInstPtr _eaCompPtr = nullStaticInstPtr,
85 StaticInstPtr _memAccPtr = nullStaticInstPtr)
86 : Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr),
73 MemoryDisp32(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
74 : Memory(mnem, _machInst, __opClass),
87 disp(MEMDISP)
88 {
89 }
90 };
91
92
93 /**
94 * Base class for a few miscellaneous memory-format insts
95 * that don't interpret the disp field: wh64, fetch, fetch_m, ecb.
96 * None of these instructions has a destination register either.
97 */
98 class MemoryNoDisp : public Memory
99 {
100 protected:
101 /// Constructor
75 disp(MEMDISP)
76 {
77 }
78 };
79
80
81 /**
82 * Base class for a few miscellaneous memory-format insts
83 * that don't interpret the disp field: wh64, fetch, fetch_m, ecb.
84 * None of these instructions has a destination register either.
85 */
86 class MemoryNoDisp : public Memory
87 {
88 protected:
89 /// Constructor
102 MemoryNoDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass,
103 StaticInstPtr _eaCompPtr = nullStaticInstPtr,
104 StaticInstPtr _memAccPtr = nullStaticInstPtr)
105 : Memory(mnem, _machInst, __opClass, _eaCompPtr, _memAccPtr)
90 MemoryNoDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
91 : Memory(mnem, _machInst, __opClass)
106 {
107 }
108
109 std::string
110 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
111 };
112}};
113

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137
138
139def template LoadStoreDeclare {{
140 /**
141 * Static instruction class for "%(mnemonic)s".
142 */
143 class %(class_name)s : public %(base_class)s
144 {
92 {
93 }
94
95 std::string
96 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
97 };
98}};
99

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123
124
125def template LoadStoreDeclare {{
126 /**
127 * Static instruction class for "%(mnemonic)s".
128 */
129 class %(class_name)s : public %(base_class)s
130 {
145 protected:
146
147 /**
148 * "Fake" effective address computation class for "%(mnemonic)s".
149 */
150 class EAComp : public %(base_class)s
151 {
152 public:
153 /// Constructor
154 EAComp(ExtMachInst machInst);
155
156 %(BasicExecDeclare)s
157 };
158
159 /**
160 * "Fake" memory access instruction class for "%(mnemonic)s".
161 */
162 class MemAcc : public %(base_class)s
163 {
164 public:
165 /// Constructor
166 MemAcc(ExtMachInst machInst);
167
168 %(BasicExecDeclare)s
169 };
170
171 public:
172
173 /// Constructor.
174 %(class_name)s(ExtMachInst machInst);
175
176 %(BasicExecDeclare)s
177
131 public:
132
133 /// Constructor.
134 %(class_name)s(ExtMachInst machInst);
135
136 %(BasicExecDeclare)s
137
138 %(EACompDeclare)s
139
178 %(InitiateAccDeclare)s
179
180 %(CompleteAccDeclare)s
181
182 %(MemAccSizeDeclare)s
183 };
184}};
185
186
140 %(InitiateAccDeclare)s
141
142 %(CompleteAccDeclare)s
143
144 %(MemAccSizeDeclare)s
145 };
146}};
147
148
149def template EACompDeclare {{
150 Fault eaComp(%(CPU_exec_context)s *, Trace::InstRecord *) const;
151}};
152
187def template InitiateAccDeclare {{
188 Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
189}};
190
191
192def template CompleteAccDeclare {{
193 Fault completeAcc(PacketPtr, %(CPU_exec_context)s *,
194 Trace::InstRecord *) const;

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209def template LoadStoreMemAccSize {{
210 int %(class_name)s::memAccSize(%(CPU_exec_context)s *xc)
211 {
212 // Return the memory access size in bytes
213 return (%(mem_acc_size)d / 8);
214 }
215}};
216
153def template InitiateAccDeclare {{
154 Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
155}};
156
157
158def template CompleteAccDeclare {{
159 Fault completeAcc(PacketPtr, %(CPU_exec_context)s *,
160 Trace::InstRecord *) const;

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175def template LoadStoreMemAccSize {{
176 int %(class_name)s::memAccSize(%(CPU_exec_context)s *xc)
177 {
178 // Return the memory access size in bytes
179 return (%(mem_acc_size)d / 8);
180 }
181}};
182
217def template EACompConstructor {{
218 /** TODO: change op_class to AddrGenOp or something (requires
219 * creating new member of OpClass enum in op_class.hh, updating
220 * config files, etc.). */
221 inline %(class_name)s::EAComp::EAComp(ExtMachInst machInst)
222 : %(base_class)s("%(mnemonic)s (EAComp)", machInst, IntAluOp)
223 {
224 %(constructor)s;
225 }
226}};
227
183
228
229def template MemAccConstructor {{
230 inline %(class_name)s::MemAcc::MemAcc(ExtMachInst machInst)
231 : %(base_class)s("%(mnemonic)s (MemAcc)", machInst, %(op_class)s)
232 {
233 %(constructor)s;
234 }
235}};
236
237
238def template LoadStoreConstructor {{
239 inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
184def template LoadStoreConstructor {{
185 inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
240 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
241 new EAComp(machInst), new MemAcc(machInst))
186 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
242 {
243 %(constructor)s;
244 }
245}};
246
187 {
188 %(constructor)s;
189 }
190}};
191
247
248def template EACompExecute {{
192def template EACompExecute {{
249 Fault
250 %(class_name)s::EAComp::execute(%(CPU_exec_context)s *xc,
251 Trace::InstRecord *traceData) const
193 Fault %(class_name)s::eaComp(%(CPU_exec_context)s *xc,
194 Trace::InstRecord *traceData) const
252 {
253 Addr EA;
254 Fault fault = NoFault;
255
256 %(fp_enable_check)s;
257 %(op_decl)s;
258 %(op_rd)s;
259 %(ea_code)s;
260
261 if (fault == NoFault) {
262 %(op_wb)s;
263 xc->setEA(EA);
264 }
265
266 return fault;
267 }
268}};
269
195 {
196 Addr EA;
197 Fault fault = NoFault;
198
199 %(fp_enable_check)s;
200 %(op_decl)s;
201 %(op_rd)s;
202 %(ea_code)s;
203
204 if (fault == NoFault) {
205 %(op_wb)s;
206 xc->setEA(EA);
207 }
208
209 return fault;
210 }
211}};
212
270def template LoadMemAccExecute {{
271 Fault
272 %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
273 Trace::InstRecord *traceData) const
274 {
275 Addr EA;
276 Fault fault = NoFault;
277
213
278 %(fp_enable_check)s;
279 %(op_decl)s;
280 %(op_rd)s;
281 EA = xc->getEA();
282
283 if (fault == NoFault) {
284 fault = xc->read(EA, (uint%(mem_acc_size)d_t&)Mem, memAccessFlags);
285 %(memacc_code)s;
286 }
287
288 if (fault == NoFault) {
289 %(op_wb)s;
290 }
291
292 return fault;
293 }
294}};
295
296
297def template LoadExecute {{
298 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
299 Trace::InstRecord *traceData) const
300 {
301 Addr EA;
302 Fault fault = NoFault;
303
304 %(fp_enable_check)s;

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361 %(op_wb)s;
362 }
363
364 return fault;
365 }
366}};
367
368
214def template LoadExecute {{
215 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
216 Trace::InstRecord *traceData) const
217 {
218 Addr EA;
219 Fault fault = NoFault;
220
221 %(fp_enable_check)s;

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278 %(op_wb)s;
279 }
280
281 return fault;
282 }
283}};
284
285
369def template StoreMemAccExecute {{
370 Fault
371 %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
372 Trace::InstRecord *traceData) const
373 {
374 Addr EA;
375 Fault fault = NoFault;
376
377 %(fp_enable_check)s;
378 %(op_decl)s;
379 %(op_rd)s;
380 EA = xc->getEA();
381
382 if (fault == NoFault) {
383 %(memacc_code)s;
384 }
385
386 if (fault == NoFault) {
387 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
388 memAccessFlags, NULL);
389 if (traceData) { traceData->setData(Mem); }
390 }
391
392 if (fault == NoFault) {
393 %(postacc_code)s;
394 }
395
396 if (fault == NoFault) {
397 %(op_wb)s;
398 }
399
400 return fault;
401 }
402}};
403
404def template StoreCondMemAccExecute {{
405 Fault
406 %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
407 Trace::InstRecord *traceData) const
408 {
409 Addr EA;
410 Fault fault = NoFault;
411 uint64_t write_result = 0;
412
413 %(fp_enable_check)s;
414 %(op_decl)s;
415 %(op_rd)s;
416 EA = xc->getEA();
417
418 if (fault == NoFault) {
419 %(memacc_code)s;
420 }
421
422 if (fault == NoFault) {
423 fault = xc->write((uint%(mem_acc_size)d_t&)Mem, EA,
424 memAccessFlags, &write_result);
425 if (traceData) { traceData->setData(Mem); }
426 }
427
428 if (fault == NoFault) {
429 %(postacc_code)s;
430 }
431
432 if (fault == NoFault) {
433 %(op_wb)s;
434 }
435
436 return fault;
437 }
438}};
439
440
441def template StoreExecute {{
442 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
443 Trace::InstRecord *traceData) const
444 {
445 Addr EA;
446 Fault fault = NoFault;
447
448 %(fp_enable_check)s;

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577 %(op_wb)s;
578 }
579
580 return fault;
581 }
582}};
583
584
286def template StoreExecute {{
287 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
288 Trace::InstRecord *traceData) const
289 {
290 Addr EA;
291 Fault fault = NoFault;
292
293 %(fp_enable_check)s;

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422 %(op_wb)s;
423 }
424
425 return fault;
426 }
427}};
428
429
585def template MiscMemAccExecute {{
586 Fault %(class_name)s::MemAcc::execute(%(CPU_exec_context)s *xc,
587 Trace::InstRecord *traceData) const
588 {
589 Addr EA;
590 Fault fault = NoFault;
591
592 %(fp_enable_check)s;
593 %(op_decl)s;
594 %(op_rd)s;
595 EA = xc->getEA();
596
597 if (fault == NoFault) {
598 %(memacc_code)s;
599 }
600
601 return NoFault;
602 }
603}};
604
605def template MiscExecute {{
606 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
607 Trace::InstRecord *traceData) const
608 {
609 Addr EA;
610 Fault fault = NoFault;
611
612 %(fp_enable_check)s;

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695 # are nested inside the larger "atomic" one.
696
697 # Generate InstObjParams for each of the three objects. Note that
698 # they differ only in the set of code objects contained (which in
699 # turn affects the object's overall operand list).
700 iop = InstObjParams(name, Name, base_class,
701 { 'ea_code':ea_code, 'memacc_code':memacc_code, 'postacc_code':postacc_code },
702 inst_flags)
430def template MiscExecute {{
431 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
432 Trace::InstRecord *traceData) const
433 {
434 Addr EA;
435 Fault fault = NoFault;
436
437 %(fp_enable_check)s;

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520 # are nested inside the larger "atomic" one.
521
522 # Generate InstObjParams for each of the three objects. Note that
523 # they differ only in the set of code objects contained (which in
524 # turn affects the object's overall operand list).
525 iop = InstObjParams(name, Name, base_class,
526 { 'ea_code':ea_code, 'memacc_code':memacc_code, 'postacc_code':postacc_code },
527 inst_flags)
703 ea_iop = InstObjParams(name, Name, base_class,
704 { 'ea_code':ea_code },
705 inst_flags)
706 memacc_iop = InstObjParams(name, Name, base_class,
707 { 'memacc_code':memacc_code, 'postacc_code':postacc_code },
708 inst_flags)
709
710 if mem_flags:
711 mem_flags = [ 'Request::%s' % flag for flag in mem_flags ]
712 s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';'
713 iop.constructor += s
714 memacc_iop.constructor += s
715
716 # select templates
717
718 # The InitiateAcc template is the same for StoreCond templates as the
719 # corresponding Store template..
720 StoreCondInitiateAcc = StoreInitiateAcc
721
528 memacc_iop = InstObjParams(name, Name, base_class,
529 { 'memacc_code':memacc_code, 'postacc_code':postacc_code },
530 inst_flags)
531
532 if mem_flags:
533 mem_flags = [ 'Request::%s' % flag for flag in mem_flags ]
534 s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';'
535 iop.constructor += s
536 memacc_iop.constructor += s
537
538 # select templates
539
540 # The InitiateAcc template is the same for StoreCond templates as the
541 # corresponding Store template..
542 StoreCondInitiateAcc = StoreInitiateAcc
543
722 memAccExecTemplate = eval(exec_template_base + 'MemAccExecute')
723 fullExecTemplate = eval(exec_template_base + 'Execute')
724 initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
725 completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
726
727 if (exec_template_base == 'Load' or exec_template_base == 'Store'):
728 memAccSizeTemplate = eval('LoadStoreMemAccSize')
729 else:
730 memAccSizeTemplate = eval('MiscMemAccSize')
731
732 # (header_output, decoder_output, decode_block, exec_output)
733 return (LoadStoreDeclare.subst(iop),
544 fullExecTemplate = eval(exec_template_base + 'Execute')
545 initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
546 completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
547
548 if (exec_template_base == 'Load' or exec_template_base == 'Store'):
549 memAccSizeTemplate = eval('LoadStoreMemAccSize')
550 else:
551 memAccSizeTemplate = eval('MiscMemAccSize')
552
553 # (header_output, decoder_output, decode_block, exec_output)
554 return (LoadStoreDeclare.subst(iop),
734 EACompConstructor.subst(ea_iop)
735 + MemAccConstructor.subst(memacc_iop)
736 + LoadStoreConstructor.subst(iop),
555 LoadStoreConstructor.subst(iop),
737 decode_template.subst(iop),
556 decode_template.subst(iop),
738 EACompExecute.subst(ea_iop)
739 + memAccExecTemplate.subst(memacc_iop)
740 + fullExecTemplate.subst(iop)
557 fullExecTemplate.subst(iop)
558 + EACompExecute.subst(iop)
741 + initiateAccTemplate.subst(iop)
742 + completeAccTemplate.subst(iop)
743 + memAccSizeTemplate.subst(memacc_iop))
744}};
745
746def format LoadOrNop(memacc_code, ea_code = {{ EA = Rb + disp; }},
747 mem_flags = [], inst_flags = []) {{
748 (header_output, decoder_output, decode_block, exec_output) = \

--- 63 unchanged lines hidden --- 		559 + initiateAccTemplate.subst(iop)
560 + completeAccTemplate.subst(iop)
561 + memAccSizeTemplate.subst(memacc_iop))
562}};
563
564def format LoadOrNop(memacc_code, ea_code = {{ EA = Rb + disp; }},
565 mem_flags = [], inst_flags = []) {{
566 (header_output, decoder_output, decode_block, exec_output) = \

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