mem.isa (11303:f694764d656d) mem.isa (12234:78ece221f9f5)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2005 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

--- 127 unchanged lines hidden (view full) ---

136 %(InitiateAccDeclare)s
137
138 %(CompleteAccDeclare)s
139 };
140}};
141
142
143def template EACompDeclare {{
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2005 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

--- 127 unchanged lines hidden (view full) ---

136 %(InitiateAccDeclare)s
137
138 %(CompleteAccDeclare)s
139 };
140}};
141
142
143def template EACompDeclare {{
144 Fault eaComp(%(CPU_exec_context)s *, Trace::InstRecord *) const;
144 Fault eaComp(ExecContext *, Trace::InstRecord *) const;
145}};
146
147def template InitiateAccDeclare {{
145}};
146
147def template InitiateAccDeclare {{
148 Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
148 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
149}};
150
151
152def template CompleteAccDeclare {{
149}};
150
151
152def template CompleteAccDeclare {{
153 Fault completeAcc(PacketPtr, %(CPU_exec_context)s *,
154 Trace::InstRecord *) const;
153 Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
155}};
156
157def template LoadStoreConstructor {{
158 %(class_name)s::%(class_name)s(ExtMachInst machInst)
159 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
160 {
161 %(constructor)s;
162 }
163}};
164
165def template EACompExecute {{
154}};
155
156def template LoadStoreConstructor {{
157 %(class_name)s::%(class_name)s(ExtMachInst machInst)
158 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
159 {
160 %(constructor)s;
161 }
162}};
163
164def template EACompExecute {{
166 Fault %(class_name)s::eaComp(CPU_EXEC_CONTEXT *xc,
167 Trace::InstRecord *traceData) const
165 Fault %(class_name)s::eaComp(ExecContext *xc,
166 Trace::InstRecord *traceData) const
168 {
169 Addr EA;
170 Fault fault = NoFault;
171
172 %(fp_enable_check)s;
173 %(op_decl)s;
174 %(op_rd)s;
175 %(ea_code)s;

--- 4 unchanged lines hidden (view full) ---

180 }
181
182 return fault;
183 }
184}};
185
186
187def template LoadExecute {{
167 {
168 Addr EA;
169 Fault fault = NoFault;
170
171 %(fp_enable_check)s;
172 %(op_decl)s;
173 %(op_rd)s;
174 %(ea_code)s;

--- 4 unchanged lines hidden (view full) ---

179 }
180
181 return fault;
182 }
183}};
184
185
186def template LoadExecute {{
188 Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
187 Fault %(class_name)s::execute(ExecContext *xc,
189 Trace::InstRecord *traceData) const
190 {
191 Addr EA;
192 Fault fault = NoFault;
193
194 %(fp_enable_check)s;
195 %(op_decl)s;
196 %(op_rd)s;

--- 9 unchanged lines hidden (view full) ---

206 }
207
208 return fault;
209 }
210}};
211
212
213def template LoadInitiateAcc {{
188 Trace::InstRecord *traceData) const
189 {
190 Addr EA;
191 Fault fault = NoFault;
192
193 %(fp_enable_check)s;
194 %(op_decl)s;
195 %(op_rd)s;

--- 9 unchanged lines hidden (view full) ---

205 }
206
207 return fault;
208 }
209}};
210
211
212def template LoadInitiateAcc {{
214 Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc,
213 Fault %(class_name)s::initiateAcc(ExecContext *xc,
215 Trace::InstRecord *traceData) const
216 {
217 Addr EA;
218 Fault fault = NoFault;
219
220 %(fp_enable_check)s;
221 %(op_src_decl)s;
222 %(op_rd)s;

--- 4 unchanged lines hidden (view full) ---

227 }
228
229 return fault;
230 }
231}};
232
233
234def template LoadCompleteAcc {{
214 Trace::InstRecord *traceData) const
215 {
216 Addr EA;
217 Fault fault = NoFault;
218
219 %(fp_enable_check)s;
220 %(op_src_decl)s;
221 %(op_rd)s;

--- 4 unchanged lines hidden (view full) ---

226 }
227
228 return fault;
229 }
230}};
231
232
233def template LoadCompleteAcc {{
235 Fault %(class_name)s::completeAcc(PacketPtr pkt,
236 CPU_EXEC_CONTEXT *xc,
234 Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc,
237 Trace::InstRecord *traceData) const
238 {
239 Fault fault = NoFault;
240
241 %(fp_enable_check)s;
242 %(op_decl)s;
243
244 getMem(pkt, Mem, traceData);

--- 7 unchanged lines hidden (view full) ---

252 }
253
254 return fault;
255 }
256}};
257
258
259def template StoreExecute {{
235 Trace::InstRecord *traceData) const
236 {
237 Fault fault = NoFault;
238
239 %(fp_enable_check)s;
240 %(op_decl)s;
241
242 getMem(pkt, Mem, traceData);

--- 7 unchanged lines hidden (view full) ---

250 }
251
252 return fault;
253 }
254}};
255
256
257def template StoreExecute {{
260 Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
258 Fault %(class_name)s::execute(ExecContext *xc,
261 Trace::InstRecord *traceData) const
262 {
263 Addr EA;
264 Fault fault = NoFault;
265
266 %(fp_enable_check)s;
267 %(op_decl)s;
268 %(op_rd)s;

--- 16 unchanged lines hidden (view full) ---

285 %(op_wb)s;
286 }
287
288 return fault;
289 }
290}};
291
292def template StoreCondExecute {{
259 Trace::InstRecord *traceData) const
260 {
261 Addr EA;
262 Fault fault = NoFault;
263
264 %(fp_enable_check)s;
265 %(op_decl)s;
266 %(op_rd)s;

--- 16 unchanged lines hidden (view full) ---

283 %(op_wb)s;
284 }
285
286 return fault;
287 }
288}};
289
290def template StoreCondExecute {{
293 Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
291 Fault %(class_name)s::execute(ExecContext *xc,
294 Trace::InstRecord *traceData) const
295 {
296 Addr EA;
297 Fault fault = NoFault;
298 uint64_t write_result = 0;
299
300 %(fp_enable_check)s;
301 %(op_decl)s;

--- 17 unchanged lines hidden (view full) ---

319 %(op_wb)s;
320 }
321
322 return fault;
323 }
324}};
325
326def template StoreInitiateAcc {{
292 Trace::InstRecord *traceData) const
293 {
294 Addr EA;
295 Fault fault = NoFault;
296 uint64_t write_result = 0;
297
298 %(fp_enable_check)s;
299 %(op_decl)s;

--- 17 unchanged lines hidden (view full) ---

317 %(op_wb)s;
318 }
319
320 return fault;
321 }
322}};
323
324def template StoreInitiateAcc {{
327 Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc,
325 Fault %(class_name)s::initiateAcc(ExecContext *xc,
328 Trace::InstRecord *traceData) const
329 {
330 Addr EA;
331 Fault fault = NoFault;
332
333 %(fp_enable_check)s;
334 %(op_decl)s;
335 %(op_rd)s;

--- 9 unchanged lines hidden (view full) ---

345 }
346
347 return fault;
348 }
349}};
350
351
352def template StoreCompleteAcc {{
326 Trace::InstRecord *traceData) const
327 {
328 Addr EA;
329 Fault fault = NoFault;
330
331 %(fp_enable_check)s;
332 %(op_decl)s;
333 %(op_rd)s;

--- 9 unchanged lines hidden (view full) ---

343 }
344
345 return fault;
346 }
347}};
348
349
350def template StoreCompleteAcc {{
353 Fault %(class_name)s::completeAcc(PacketPtr pkt,
354 CPU_EXEC_CONTEXT *xc,
351 Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc,
355 Trace::InstRecord *traceData) const
356 {
357 return NoFault;
358 }
359}};
360
361
362def template StoreCondCompleteAcc {{
352 Trace::InstRecord *traceData) const
353 {
354 return NoFault;
355 }
356}};
357
358
359def template StoreCondCompleteAcc {{
363 Fault %(class_name)s::completeAcc(PacketPtr pkt,
364 CPU_EXEC_CONTEXT *xc,
360 Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc,
365 Trace::InstRecord *traceData) const
366 {
367 Fault fault = NoFault;
368
369 %(fp_enable_check)s;
370 %(op_dest_decl)s;
371
372 uint64_t write_result = pkt->req->getExtraData();

--- 7 unchanged lines hidden (view full) ---

380 }
381
382 return fault;
383 }
384}};
385
386
387def template MiscExecute {{
361 Trace::InstRecord *traceData) const
362 {
363 Fault fault = NoFault;
364
365 %(fp_enable_check)s;
366 %(op_dest_decl)s;
367
368 uint64_t write_result = pkt->req->getExtraData();

--- 7 unchanged lines hidden (view full) ---

376 }
377
378 return fault;
379 }
380}};
381
382
383def template MiscExecute {{
388 Fault %(class_name)s::execute(CPU_EXEC_CONTEXT *xc,
384 Fault %(class_name)s::execute(ExecContext *xc,
389 Trace::InstRecord *traceData) const
390 {
391 Addr EA M5_VAR_USED;
392 Fault fault = NoFault;
393
394 %(fp_enable_check)s;
395 %(op_decl)s;
396 %(op_rd)s;

--- 6 unchanged lines hidden (view full) ---

403
404 return NoFault;
405 }
406}};
407
408// Prefetches in Alpha don't actually do anything
409// They just build an effective address and complete
410def template MiscInitiateAcc {{
385 Trace::InstRecord *traceData) const
386 {
387 Addr EA M5_VAR_USED;
388 Fault fault = NoFault;
389
390 %(fp_enable_check)s;
391 %(op_decl)s;
392 %(op_rd)s;

--- 6 unchanged lines hidden (view full) ---

399
400 return NoFault;
401 }
402}};
403
404// Prefetches in Alpha don't actually do anything
405// They just build an effective address and complete
406def template MiscInitiateAcc {{
411 Fault %(class_name)s::initiateAcc(CPU_EXEC_CONTEXT *xc,
407 Fault %(class_name)s::initiateAcc(ExecContext *xc,
412 Trace::InstRecord *traceData) const
413 {
414 warn("initiateAcc undefined: Misc instruction does not support split "
415 "access method!");
416 return NoFault;
417 }
418}};
419
420
421def template MiscCompleteAcc {{
408 Trace::InstRecord *traceData) const
409 {
410 warn("initiateAcc undefined: Misc instruction does not support split "
411 "access method!");
412 return NoFault;
413 }
414}};
415
416
417def template MiscCompleteAcc {{
422 Fault %(class_name)s::completeAcc(PacketPtr pkt,
423 CPU_EXEC_CONTEXT *xc,
418 Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc,
424 Trace::InstRecord *traceData) const
425 {
426 warn("completeAcc undefined: Misc instruction does not support split "
427 "access method!");
428
429 return NoFault;
430 }
431}};

--- 129 unchanged lines hidden --- 		419 Trace::InstRecord *traceData) const
420 {
421 warn("completeAcc undefined: Misc instruction does not support split "
422 "access method!");
423
424 return NoFault;
425 }
426}};

--- 129 unchanged lines hidden ---