1// -*- mode:c++ -*- 2 3// Copyright (c) 2003-2005 The Regents of The University of Michigan 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 127 unchanged lines hidden (view full) --- 136 %(InitiateAccDeclare)s 137 138 %(CompleteAccDeclare)s 139 }; 140}}; 141 142 143def template EACompDeclare {{ |
144 Fault eaComp(ExecContext *, Trace::InstRecord *) const; |
145}}; 146 147def template InitiateAccDeclare {{ |
148 Fault initiateAcc(ExecContext *, Trace::InstRecord *) const; |
149}}; 150 151 152def template CompleteAccDeclare {{ |
153 Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const; |
154}}; 155 156def template LoadStoreConstructor {{ 157 %(class_name)s::%(class_name)s(ExtMachInst machInst) 158 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s) 159 { 160 %(constructor)s; 161 } 162}}; 163 164def template EACompExecute {{ |
165 Fault %(class_name)s::eaComp(ExecContext *xc, 166 Trace::InstRecord *traceData) const |
167 { 168 Addr EA; 169 Fault fault = NoFault; 170 171 %(fp_enable_check)s; 172 %(op_decl)s; 173 %(op_rd)s; 174 %(ea_code)s; --- 4 unchanged lines hidden (view full) --- 179 } 180 181 return fault; 182 } 183}}; 184 185 186def template LoadExecute {{ |
187 Fault %(class_name)s::execute(ExecContext *xc, |
188 Trace::InstRecord *traceData) const 189 { 190 Addr EA; 191 Fault fault = NoFault; 192 193 %(fp_enable_check)s; 194 %(op_decl)s; 195 %(op_rd)s; --- 9 unchanged lines hidden (view full) --- 205 } 206 207 return fault; 208 } 209}}; 210 211 212def template LoadInitiateAcc {{ |
213 Fault %(class_name)s::initiateAcc(ExecContext *xc, |
214 Trace::InstRecord *traceData) const 215 { 216 Addr EA; 217 Fault fault = NoFault; 218 219 %(fp_enable_check)s; 220 %(op_src_decl)s; 221 %(op_rd)s; --- 4 unchanged lines hidden (view full) --- 226 } 227 228 return fault; 229 } 230}}; 231 232 233def template LoadCompleteAcc {{ |
234 Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, |
235 Trace::InstRecord *traceData) const 236 { 237 Fault fault = NoFault; 238 239 %(fp_enable_check)s; 240 %(op_decl)s; 241 242 getMem(pkt, Mem, traceData); --- 7 unchanged lines hidden (view full) --- 250 } 251 252 return fault; 253 } 254}}; 255 256 257def template StoreExecute {{ |
258 Fault %(class_name)s::execute(ExecContext *xc, |
259 Trace::InstRecord *traceData) const 260 { 261 Addr EA; 262 Fault fault = NoFault; 263 264 %(fp_enable_check)s; 265 %(op_decl)s; 266 %(op_rd)s; --- 16 unchanged lines hidden (view full) --- 283 %(op_wb)s; 284 } 285 286 return fault; 287 } 288}}; 289 290def template StoreCondExecute {{ |
291 Fault %(class_name)s::execute(ExecContext *xc, |
292 Trace::InstRecord *traceData) const 293 { 294 Addr EA; 295 Fault fault = NoFault; 296 uint64_t write_result = 0; 297 298 %(fp_enable_check)s; 299 %(op_decl)s; --- 17 unchanged lines hidden (view full) --- 317 %(op_wb)s; 318 } 319 320 return fault; 321 } 322}}; 323 324def template StoreInitiateAcc {{ |
325 Fault %(class_name)s::initiateAcc(ExecContext *xc, |
326 Trace::InstRecord *traceData) const 327 { 328 Addr EA; 329 Fault fault = NoFault; 330 331 %(fp_enable_check)s; 332 %(op_decl)s; 333 %(op_rd)s; --- 9 unchanged lines hidden (view full) --- 343 } 344 345 return fault; 346 } 347}}; 348 349 350def template StoreCompleteAcc {{ |
351 Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, |
352 Trace::InstRecord *traceData) const 353 { 354 return NoFault; 355 } 356}}; 357 358 359def template StoreCondCompleteAcc {{ |
360 Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, |
361 Trace::InstRecord *traceData) const 362 { 363 Fault fault = NoFault; 364 365 %(fp_enable_check)s; 366 %(op_dest_decl)s; 367 368 uint64_t write_result = pkt->req->getExtraData(); --- 7 unchanged lines hidden (view full) --- 376 } 377 378 return fault; 379 } 380}}; 381 382 383def template MiscExecute {{ |
384 Fault %(class_name)s::execute(ExecContext *xc, |
385 Trace::InstRecord *traceData) const 386 { 387 Addr EA M5_VAR_USED; 388 Fault fault = NoFault; 389 390 %(fp_enable_check)s; 391 %(op_decl)s; 392 %(op_rd)s; --- 6 unchanged lines hidden (view full) --- 399 400 return NoFault; 401 } 402}}; 403 404// Prefetches in Alpha don't actually do anything 405// They just build an effective address and complete 406def template MiscInitiateAcc {{ |
407 Fault %(class_name)s::initiateAcc(ExecContext *xc, |
408 Trace::InstRecord *traceData) const 409 { 410 warn("initiateAcc undefined: Misc instruction does not support split " 411 "access method!"); 412 return NoFault; 413 } 414}}; 415 416 417def template MiscCompleteAcc {{ |
418 Fault %(class_name)s::completeAcc(PacketPtr pkt, ExecContext *xc, |
419 Trace::InstRecord *traceData) const 420 { 421 warn("completeAcc undefined: Misc instruction does not support split " 422 "access method!"); 423 424 return NoFault; 425 } 426}}; --- 129 unchanged lines hidden --- |