1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2005 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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39 * Base class for general Alpha memory-format instructions.
40 */
41 class Memory : public AlphaStaticInst
42 {
43 protected:
44
45 /// Memory request flags. See mem_req_base.hh.
46 Request::Flags memAccessFlags;
47
48 /// Constructor
49 Memory(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
50 : AlphaStaticInst(mnem, _machInst, __opClass)
51 {
52 }
53
54 std::string
55 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
56
57 public:
58
59 Request::Flags memAccFlags() { return memAccessFlags; }
60 };
61
62 /**
63 * Base class for memory-format instructions using a 32-bit
64 * displacement (i.e. most of them).
65 */
66 class MemoryDisp32 : public Memory
67 {
68 protected:
69 /// Displacement for EA calculation (signed).
70 int32_t disp;
71
72 /// Constructor.
73 MemoryDisp32(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
74 : Memory(mnem, _machInst, __opClass),
75 disp(MEMDISP)
76 {
77 }
78 };
79
80
81 /**
82 * Base class for a few miscellaneous memory-format insts
83 * that don't interpret the disp field: wh64, fetch, fetch_m, ecb.
84 * None of these instructions has a destination register either.
85 */
86 class MemoryNoDisp : public Memory
87 {
88 protected:
89 /// Constructor
90 MemoryNoDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
91 : Memory(mnem, _machInst, __opClass)
92 {
93 }
94
95 std::string
96 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
97 };
98}};
99

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123
124
125def template LoadStoreDeclare {{
126 /**
127 * Static instruction class for "%(mnemonic)s".
128 */
129 class %(class_name)s : public %(base_class)s
130 {
131 public:
132
133 /// Constructor.
134 %(class_name)s(ExtMachInst machInst);
135
136 %(BasicExecDeclare)s
137
138 %(EACompDeclare)s
139
140 %(InitiateAccDeclare)s
141
142 %(CompleteAccDeclare)s
143
144 %(MemAccSizeDeclare)s
145 };
146}};
147
148
149def template EACompDeclare {{
150 Fault eaComp(%(CPU_exec_context)s *, Trace::InstRecord *) const;
151}};
152
153def template InitiateAccDeclare {{
154 Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const;
155}};
156
157
158def template CompleteAccDeclare {{
159 Fault completeAcc(PacketPtr, %(CPU_exec_context)s *,
160 Trace::InstRecord *) const;

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175def template LoadStoreMemAccSize {{
176 int %(class_name)s::memAccSize(%(CPU_exec_context)s *xc)
177 {
178 // Return the memory access size in bytes
179 return (%(mem_acc_size)d / 8);
180 }
181}};
182
183
184def template LoadStoreConstructor {{
185 inline %(class_name)s::%(class_name)s(ExtMachInst machInst)
186 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s)
187 {
188 %(constructor)s;
189 }
190}};
191
192def template EACompExecute {{
193 Fault %(class_name)s::eaComp(%(CPU_exec_context)s *xc,
194 Trace::InstRecord *traceData) const
195 {
196 Addr EA;
197 Fault fault = NoFault;
198
199 %(fp_enable_check)s;
200 %(op_decl)s;
201 %(op_rd)s;
202 %(ea_code)s;
203
204 if (fault == NoFault) {
205 %(op_wb)s;
206 xc->setEA(EA);
207 }
208
209 return fault;
210 }
211}};
212
213
214def template LoadExecute {{
215 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
216 Trace::InstRecord *traceData) const
217 {
218 Addr EA;
219 Fault fault = NoFault;
220
221 %(fp_enable_check)s;

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278 %(op_wb)s;
279 }
280
281 return fault;
282 }
283}};
284
285
286def template StoreExecute {{
287 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
288 Trace::InstRecord *traceData) const
289 {
290 Addr EA;
291 Fault fault = NoFault;
292
293 %(fp_enable_check)s;

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422 %(op_wb)s;
423 }
424
425 return fault;
426 }
427}};
428
429
430def template MiscExecute {{
431 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
432 Trace::InstRecord *traceData) const
433 {
434 Addr EA;
435 Fault fault = NoFault;
436
437 %(fp_enable_check)s;

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520 # are nested inside the larger "atomic" one.
521
522 # Generate InstObjParams for each of the three objects. Note that
523 # they differ only in the set of code objects contained (which in
524 # turn affects the object's overall operand list).
525 iop = InstObjParams(name, Name, base_class,
526 { 'ea_code':ea_code, 'memacc_code':memacc_code, 'postacc_code':postacc_code },
527 inst_flags)
528 memacc_iop = InstObjParams(name, Name, base_class,
529 { 'memacc_code':memacc_code, 'postacc_code':postacc_code },
530 inst_flags)
531
532 if mem_flags:
533 mem_flags = [ 'Request::%s' % flag for flag in mem_flags ]
534 s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';'
535 iop.constructor += s
536 memacc_iop.constructor += s
537
538 # select templates
539
540 # The InitiateAcc template is the same for StoreCond templates as the
541 # corresponding Store template..
542 StoreCondInitiateAcc = StoreInitiateAcc
543
544 fullExecTemplate = eval(exec_template_base + 'Execute')
545 initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
546 completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
547
548 if (exec_template_base == 'Load' or exec_template_base == 'Store'):
549 memAccSizeTemplate = eval('LoadStoreMemAccSize')
550 else:
551 memAccSizeTemplate = eval('MiscMemAccSize')
552
553 # (header_output, decoder_output, decode_block, exec_output)
554 return (LoadStoreDeclare.subst(iop),
555 LoadStoreConstructor.subst(iop),
556 decode_template.subst(iop),
557 fullExecTemplate.subst(iop)
558 + EACompExecute.subst(iop)
559 + initiateAccTemplate.subst(iop)
560 + completeAccTemplate.subst(iop)
561 + memAccSizeTemplate.subst(memacc_iop))
562}};
563
564def format LoadOrNop(memacc_code, ea_code = {{ EA = Rb + disp; }},
565 mem_flags = [], inst_flags = []) {{
566 (header_output, decoder_output, decode_block, exec_output) = \

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