main.isa (10196:be0e1724eb39) main.isa (12104:edd63f9c6184)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2005 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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215
216 /**
217 * Base class for all Alpha static instructions.
218 */
219 class AlphaStaticInst : public StaticInst
220 {
221 protected:
222
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2005 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

--- 206 unchanged lines hidden (view full) ---

215
216 /**
217 * Base class for all Alpha static instructions.
218 */
219 class AlphaStaticInst : public StaticInst
220 {
221 protected:
222
223 /// Make AlphaISA register dependence tags directly visible in
224 /// this class and derived classes. Maybe these should really
225 /// live here and not in the AlphaISA namespace.
226 enum DependenceTags {
227 FP_Reg_Base = AlphaISA::FP_Reg_Base
228 };
229
230 /// Constructor.
231 AlphaStaticInst(const char *mnem, ExtMachInst _machInst,
232 OpClass __opClass)
233 : StaticInst(mnem, _machInst, __opClass)
234 {
235 }
236
237 /// Print a register name for disassembly given the unique
238 /// dependence tag number (FP or int).
223 /// Constructor.
224 AlphaStaticInst(const char *mnem, ExtMachInst _machInst,
225 OpClass __opClass)
226 : StaticInst(mnem, _machInst, __opClass)
227 {
228 }
229
230 /// Print a register name for disassembly given the unique
231 /// dependence tag number (FP or int).
239 void printReg(std::ostream &os, int reg) const;
232 void printReg(std::ostream &os, RegId reg) const;
240
241 std::string
242 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
243
244 void
245 advancePC(AlphaISA::PCState &pcState) const
246 {
247 pcState.advance();
248 }
249 };
250}};
251
252output decoder {{
253 void
233
234 std::string
235 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
236
237 void
238 advancePC(AlphaISA::PCState &pcState) const
239 {
240 pcState.advance();
241 }
242 };
243}};
244
245output decoder {{
246 void
254 AlphaStaticInst::printReg(std::ostream &os, int reg) const
247 AlphaStaticInst::printReg(std::ostream &os, RegId reg) const
255 {
248 {
256 if (reg < FP_Reg_Base) {
257 ccprintf(os, "r%d", reg);
249 if (reg.regClass == IntRegClass) {
250 ccprintf(os, "r%d", reg.regIdx);
258 }
259 else {
251 }
252 else {
260 ccprintf(os, "f%d", reg - FP_Reg_Base);
253 ccprintf(os, "f%d", reg.regIdx);
261 }
262 }
263
264 std::string
265 AlphaStaticInst::generateDisassembly(Addr pc,
266 const SymbolTable *symtab) const
267 {
268 std::stringstream ss;

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254 }
255 }
256
257 std::string
258 AlphaStaticInst::generateDisassembly(Addr pc,
259 const SymbolTable *symtab) const
260 {
261 std::stringstream ss;

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