decoder.isa (8457:7907b19fbe80) | decoder.isa (8555:6fd8d0432d8d) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2003-2006 The Regents of The University of Michigan 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 971 unchanged lines hidden (view full) --- 980 0x21: m5exit({{ 981 PseudoInst::m5exit(xc->tcBase(), R16); 982 }}, No_OpClass, IsNonSpeculative); 983#if FULL_SYSTEM 984 0x31: loadsymbol({{ 985 PseudoInst::loadsymbol(xc->tcBase()); 986 }}, No_OpClass, IsNonSpeculative); 987 0x30: initparam({{ | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2003-2006 The Regents of The University of Michigan 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 971 unchanged lines hidden (view full) --- 980 0x21: m5exit({{ 981 PseudoInst::m5exit(xc->tcBase(), R16); 982 }}, No_OpClass, IsNonSpeculative); 983#if FULL_SYSTEM 984 0x31: loadsymbol({{ 985 PseudoInst::loadsymbol(xc->tcBase()); 986 }}, No_OpClass, IsNonSpeculative); 987 0x30: initparam({{ |
988 Ra = xc->tcBase()->getCpuPtr()->system->init_param; | 988 Ra = PseudoInst::initParam(xc->tcBase()); |
989 }}); 990#endif 991 0x40: resetstats({{ 992 PseudoInst::resetstats(xc->tcBase(), R16, R17); 993 }}, IsNonSpeculative); 994 0x41: dumpstats({{ 995 PseudoInst::dumpstats(xc->tcBase(), R16, R17); 996 }}, IsNonSpeculative); --- 96 unchanged lines hidden --- | 989 }}); 990#endif 991 0x40: resetstats({{ 992 PseudoInst::resetstats(xc->tcBase(), R16, R17); 993 }}, IsNonSpeculative); 994 0x41: dumpstats({{ 995 PseudoInst::dumpstats(xc->tcBase(), R16, R17); 996 }}, IsNonSpeculative); --- 96 unchanged lines hidden --- |