decoder.isa (7794:8a7ba5a1b35d) decoder.isa (7799:5d0f62927d75)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2006 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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95 // only.
96 xc->setStCondFailures(0);
97 }
98 }}, mem_flags = LLSC, inst_flags = IsStoreConditional);
99 }
100
101 format IntegerOperate {
102
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2006 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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95 // only.
96 xc->setStCondFailures(0);
97 }
98 }}, mem_flags = LLSC, inst_flags = IsStoreConditional);
99 }
100
101 format IntegerOperate {
102
103 0x10: decode INTFUNC { // integer arithmetic operations
103 0x10: decode INTFUNC { // integer arithmetic operations
104
105 0x00: addl({{ Rc.sl = Ra.sl + Rb_or_imm.sl; }});
106 0x40: addlv({{
107 int32_t tmp = Ra.sl + Rb_or_imm.sl;
108 // signed overflow occurs when operands have same sign
109 // and sign of result does not match.
110 if (Ra.sl<31:> == Rb_or_imm.sl<31:> && tmp<31:> != Ra.sl<31:>)
111 fault = new IntegerOverflowFault;

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168 tmp |= (Ra.uq<hi:lo> >= Rb_or_imm.uq<hi:lo>) << i;
169 hi += 8;
170 lo += 8;
171 }
172 Rc = tmp;
173 }});
174 }
175
104
105 0x00: addl({{ Rc.sl = Ra.sl + Rb_or_imm.sl; }});
106 0x40: addlv({{
107 int32_t tmp = Ra.sl + Rb_or_imm.sl;
108 // signed overflow occurs when operands have same sign
109 // and sign of result does not match.
110 if (Ra.sl<31:> == Rb_or_imm.sl<31:> && tmp<31:> != Ra.sl<31:>)
111 fault = new IntegerOverflowFault;

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168 tmp |= (Ra.uq<hi:lo> >= Rb_or_imm.uq<hi:lo>) << i;
169 hi += 8;
170 lo += 8;
171 }
172 Rc = tmp;
173 }});
174 }
175
176 0x11: decode INTFUNC { // integer logical operations
176 0x11: decode INTFUNC { // integer logical operations
177
178 0x00: and({{ Rc = Ra & Rb_or_imm; }});
179 0x08: bic({{ Rc = Ra & ~Rb_or_imm; }});
180 0x20: bis({{ Rc = Ra | Rb_or_imm; }});
181 0x28: ornot({{ Rc = Ra | ~Rb_or_imm; }});
182 0x40: xor({{ Rc = Ra ^ Rb_or_imm; }});
183 0x48: eqv({{ Rc = Ra ^ ~Rb_or_imm; }});
184

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286 for (int i = 0; i < 8; ++i) {
287 if (!Rb_or_imm<i:>)
288 zapmask |= (mask(8) << (i * 8));
289 }
290 Rc = Ra & ~zapmask;
291 }});
292 }
293
177
178 0x00: and({{ Rc = Ra & Rb_or_imm; }});
179 0x08: bic({{ Rc = Ra & ~Rb_or_imm; }});
180 0x20: bis({{ Rc = Ra | Rb_or_imm; }});
181 0x28: ornot({{ Rc = Ra | ~Rb_or_imm; }});
182 0x40: xor({{ Rc = Ra ^ Rb_or_imm; }});
183 0x48: eqv({{ Rc = Ra ^ ~Rb_or_imm; }});
184

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286 for (int i = 0; i < 8; ++i) {
287 if (!Rb_or_imm<i:>)
288 zapmask |= (mask(8) << (i * 8));
289 }
290 Rc = Ra & ~zapmask;
291 }});
292 }
293
294 0x13: decode INTFUNC { // integer multiplies
294 0x13: decode INTFUNC { // integer multiplies
295 0x00: mull({{ Rc.sl = Ra.sl * Rb_or_imm.sl; }}, IntMultOp);
296 0x20: mulq({{ Rc = Ra * Rb_or_imm; }}, IntMultOp);
297 0x30: umulh({{
298 uint64_t hi, lo;
299 mul128(Ra, Rb_or_imm, hi, lo);
300 Rc = hi;
301 }}, IntMultOp);
302 0x40: mullv({{
303 // 32-bit multiply with trap on overflow
295 0x00: mull({{ Rc.sl = Ra.sl * Rb_or_imm.sl; }}, IntMultOp);
296 0x20: mulq({{ Rc = Ra * Rb_or_imm; }}, IntMultOp);
297 0x30: umulh({{
298 uint64_t hi, lo;
299 mul128(Ra, Rb_or_imm, hi, lo);
300 Rc = hi;
301 }}, IntMultOp);
302 0x40: mullv({{
303 // 32-bit multiply with trap on overflow
304 int64_t Rax = Ra.sl; // sign extended version of Ra.sl
304 int64_t Rax = Ra.sl; // sign extended version of Ra.sl
305 int64_t Rbx = Rb_or_imm.sl;
306 int64_t tmp = Rax * Rbx;
307 // To avoid overflow, all the upper 32 bits must match
308 // the sign bit of the lower 32. We code this as
309 // checking the upper 33 bits for all 0s or all 1s.
310 uint64_t sign_bits = tmp<63:31>;
311 if (sign_bits != 0 && sign_bits != mask(33))
312 fault = new IntegerOverflowFault;

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582 // Square root and integer-to-FP moves
583 0x14: decode FP_SHORTFUNC {
584 // Integer to FP register moves must have RB == 31
585 0x4: decode RB {
586 31: decode FP_FULLFUNC {
587 format BasicOperateWithNopCheck {
588 0x004: itofs({{ Fc.uq = s_to_t(Ra.ul); }}, FloatCvtOp);
589 0x024: itoft({{ Fc.uq = Ra.uq; }}, FloatCvtOp);
305 int64_t Rbx = Rb_or_imm.sl;
306 int64_t tmp = Rax * Rbx;
307 // To avoid overflow, all the upper 32 bits must match
308 // the sign bit of the lower 32. We code this as
309 // checking the upper 33 bits for all 0s or all 1s.
310 uint64_t sign_bits = tmp<63:31>;
311 if (sign_bits != 0 && sign_bits != mask(33))
312 fault = new IntegerOverflowFault;

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582 // Square root and integer-to-FP moves
583 0x14: decode FP_SHORTFUNC {
584 // Integer to FP register moves must have RB == 31
585 0x4: decode RB {
586 31: decode FP_FULLFUNC {
587 format BasicOperateWithNopCheck {
588 0x004: itofs({{ Fc.uq = s_to_t(Ra.ul); }}, FloatCvtOp);
589 0x024: itoft({{ Fc.uq = Ra.uq; }}, FloatCvtOp);
590 0x014: FailUnimpl::itoff(); // VAX-format conversion
590 0x014: FailUnimpl::itoff(); // VAX-format conversion
591 }
592 }
593 }
594
595 // Square root instructions must have FA == 31
596 0xb: decode FA {
597 31: decode FP_TYPEFUNC {
598 format FloatingPointOperate {

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592 }
593 }
594
595 // Square root instructions must have FA == 31
596 0xb: decode FA {
597 31: decode FP_TYPEFUNC {
598 format FloatingPointOperate {

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