decoder.isa (4090:08bd6439b907) decoder.isa (4172:141705d83494)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2006 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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633 }
634
635 format BasicOperate {
636 0xc000: rpcc({{
637#if FULL_SYSTEM
638 /* Rb is a fake dependency so here is a fun way to get
639 * the parser to understand that.
640 */
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2006 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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633 }
634
635 format BasicOperate {
636 0xc000: rpcc({{
637#if FULL_SYSTEM
638 /* Rb is a fake dependency so here is a fun way to get
639 * the parser to understand that.
640 */
641 Ra = xc->readMiscRegWithEffect(AlphaISA::IPR_CC) + (Rb & 0);
641 Ra = xc->readMiscReg(AlphaISA::IPR_CC) + (Rb & 0);
642
643#else
644 Ra = curTick;
645#endif
646 }}, IsUnverifiable);
647
648 // All of the barrier instructions below do nothing in
649 // their execute() methods (hence the empty code blocks).

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685 }
686#endif
687 }
688
689#if FULL_SYSTEM
690 0x00: CallPal::call_pal({{
691 if (!palValid ||
692 (palPriv
642
643#else
644 Ra = curTick;
645#endif
646 }}, IsUnverifiable);
647
648 // All of the barrier instructions below do nothing in
649 // their execute() methods (hence the empty code blocks).

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685 }
686#endif
687 }
688
689#if FULL_SYSTEM
690 0x00: CallPal::call_pal({{
691 if (!palValid ||
692 (palPriv
693 && xc->readMiscRegWithEffect(AlphaISA::IPR_ICM) != AlphaISA::mode_kernel)) {
693 && xc->readMiscReg(AlphaISA::IPR_ICM) != AlphaISA::mode_kernel)) {
694 // invalid pal function code, or attempt to do privileged
695 // PAL call in non-kernel mode
696 fault = new UnimplementedOpcodeFault;
697 }
698 else {
699 // check to see if simulator wants to do something special
700 // on this PAL call (including maybe suppress it)
701 bool dopal = xc->simPalCheck(palFunc);
702
703 if (dopal) {
694 // invalid pal function code, or attempt to do privileged
695 // PAL call in non-kernel mode
696 fault = new UnimplementedOpcodeFault;
697 }
698 else {
699 // check to see if simulator wants to do something special
700 // on this PAL call (including maybe suppress it)
701 bool dopal = xc->simPalCheck(palFunc);
702
703 if (dopal) {
704 xc->setMiscRegWithEffect(AlphaISA::IPR_EXC_ADDR, NPC);
705 NPC = xc->readMiscRegWithEffect(AlphaISA::IPR_PAL_BASE) + palOffset;
704 xc->setMiscReg(AlphaISA::IPR_EXC_ADDR, NPC);
705 NPC = xc->readMiscReg(AlphaISA::IPR_PAL_BASE) + palOffset;
706 }
707 }
708 }}, IsNonSpeculative);
709#else
710 0x00: decode PALFUNC {
711 format EmulatedCallPal {
712 0x00: halt ({{
713 exitSimLoop("halt instruction encountered");

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755 format HwMoveIPR {
756 1: hw_mfpr({{
757 int miscRegIndex = (ipr_index < MaxInternalProcRegs) ?
758 IprToMiscRegIndex[ipr_index] : -1;
759 if(miscRegIndex < 0 || !IprIsReadable(miscRegIndex) ||
760 miscRegIndex >= NumInternalProcRegs)
761 fault = new UnimplementedOpcodeFault;
762 else
706 }
707 }
708 }}, IsNonSpeculative);
709#else
710 0x00: decode PALFUNC {
711 format EmulatedCallPal {
712 0x00: halt ({{
713 exitSimLoop("halt instruction encountered");

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755 format HwMoveIPR {
756 1: hw_mfpr({{
757 int miscRegIndex = (ipr_index < MaxInternalProcRegs) ?
758 IprToMiscRegIndex[ipr_index] : -1;
759 if(miscRegIndex < 0 || !IprIsReadable(miscRegIndex) ||
760 miscRegIndex >= NumInternalProcRegs)
761 fault = new UnimplementedOpcodeFault;
762 else
763 Ra = xc->readMiscRegWithEffect(miscRegIndex);
763 Ra = xc->readMiscReg(miscRegIndex);
764 }}, IsIprAccess);
765 }
766 }
767
768 0x1d: decode PALMODE {
769 0: OpcdecFault::hw_mtpr();
770 format HwMoveIPR {
771 1: hw_mtpr({{
772 int miscRegIndex = (ipr_index < MaxInternalProcRegs) ?
773 IprToMiscRegIndex[ipr_index] : -1;
774 if(miscRegIndex < 0 || !IprIsWritable(miscRegIndex) ||
775 miscRegIndex >= NumInternalProcRegs)
776 fault = new UnimplementedOpcodeFault;
777 else
764 }}, IsIprAccess);
765 }
766 }
767
768 0x1d: decode PALMODE {
769 0: OpcdecFault::hw_mtpr();
770 format HwMoveIPR {
771 1: hw_mtpr({{
772 int miscRegIndex = (ipr_index < MaxInternalProcRegs) ?
773 IprToMiscRegIndex[ipr_index] : -1;
774 if(miscRegIndex < 0 || !IprIsWritable(miscRegIndex) ||
775 miscRegIndex >= NumInternalProcRegs)
776 fault = new UnimplementedOpcodeFault;
777 else
778 xc->setMiscRegWithEffect(miscRegIndex, Ra);
778 xc->setMiscReg(miscRegIndex, Ra);
779 if (traceData) { traceData->setData(Ra); }
780 }}, IsIprAccess);
781 }
782 }
783
784 format BasicOperate {
785 0x1e: decode PALMODE {
786 0: OpcdecFault::hw_rei();

--- 73 unchanged lines hidden --- 		779 if (traceData) { traceData->setData(Ra); }
780 }}, IsIprAccess);
781 }
782 }
783
784 format BasicOperate {
785 0x1e: decode PALMODE {
786 0: OpcdecFault::hw_rei();

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