decoder.isa (3458:acd55e0207f8) | decoder.isa (3462:ad2989480f70) |
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1// -*- mode:c++ -*- 2 3// Copyright (c) 2003-2006 The Regents of The University of Michigan 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 732 unchanged lines hidden (view full) --- 741 } 742 } 743 744 0x19: decode PALMODE { 745 0: OpcdecFault::hw_mfpr(); 746 format HwMoveIPR { 747 1: hw_mfpr({{ 748 int miscRegIndex = IprToMiscRegIndex[ipr_index]; | 1// -*- mode:c++ -*- 2 3// Copyright (c) 2003-2006 The Regents of The University of Michigan 4// All rights reserved. 5// 6// Redistribution and use in source and binary forms, with or without 7// modification, are permitted provided that the following conditions are 8// met: redistributions of source code must retain the above copyright --- 732 unchanged lines hidden (view full) --- 741 } 742 } 743 744 0x19: decode PALMODE { 745 0: OpcdecFault::hw_mfpr(); 746 format HwMoveIPR { 747 1: hw_mfpr({{ 748 int miscRegIndex = IprToMiscRegIndex[ipr_index]; |
749 if(miscRegIndex < 0 || 750 (miscRegIndex >= MinWriteOnlyIpr && 751 miscRegIndex <= MaxWriteOnlyIpr)) | 749 if(miscRegIndex < 0 || !IprIsReadable(miscRegIndex)) |
752 fault = new UnimplementedOpcodeFault; 753 else 754 Ra = xc->readMiscRegWithEffect(miscRegIndex, fault); 755 }}, IsIprAccess); 756 } 757 } 758 759 0x1d: decode PALMODE { 760 0: OpcdecFault::hw_mtpr(); 761 format HwMoveIPR { 762 1: hw_mtpr({{ 763 int miscRegIndex = IprToMiscRegIndex[ipr_index]; | 750 fault = new UnimplementedOpcodeFault; 751 else 752 Ra = xc->readMiscRegWithEffect(miscRegIndex, fault); 753 }}, IsIprAccess); 754 } 755 } 756 757 0x1d: decode PALMODE { 758 0: OpcdecFault::hw_mtpr(); 759 format HwMoveIPR { 760 1: hw_mtpr({{ 761 int miscRegIndex = IprToMiscRegIndex[ipr_index]; |
764 if(miscRegIndex < 0 || 765 (miscRegIndex >= MinReadOnlyIpr && 766 miscRegIndex <= MaxWriteOnlyIpr)) | 762 if(miscRegIndex < 0 || !IprIsWritable(miscRegIndex)) |
767 fault = new UnimplementedOpcodeFault; 768 else 769 xc->setMiscRegWithEffect(miscRegIndex, Ra); 770 if (traceData) { traceData->setData(Ra); } 771 }}, IsIprAccess); 772 } 773 } 774 --- 76 unchanged lines hidden --- | 763 fault = new UnimplementedOpcodeFault; 764 else 765 xc->setMiscRegWithEffect(miscRegIndex, Ra); 766 if (traceData) { traceData->setData(Ra); } 767 }}, IsIprAccess); 768 } 769 } 770 --- 76 unchanged lines hidden --- |