decoder.isa (2726:368aa7140e81) decoder.isa (2735:f74563d64c6b)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2006 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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42
43 format LoadOrNop {
44 0x0a: ldbu({{ Ra.uq = Mem.ub; }});
45 0x0c: ldwu({{ Ra.uq = Mem.uw; }});
46 0x0b: ldq_u({{ Ra = Mem.uq; }}, ea_code = {{ EA = (Rb + disp) & ~7; }});
47 0x23: ldt({{ Fa = Mem.df; }});
48 0x2a: ldl_l({{ Ra.sl = Mem.sl; }}, mem_flags = LOCKED);
49 0x2b: ldq_l({{ Ra.uq = Mem.uq; }}, mem_flags = LOCKED);
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2006 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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42
43 format LoadOrNop {
44 0x0a: ldbu({{ Ra.uq = Mem.ub; }});
45 0x0c: ldwu({{ Ra.uq = Mem.uw; }});
46 0x0b: ldq_u({{ Ra = Mem.uq; }}, ea_code = {{ EA = (Rb + disp) & ~7; }});
47 0x23: ldt({{ Fa = Mem.df; }});
48 0x2a: ldl_l({{ Ra.sl = Mem.sl; }}, mem_flags = LOCKED);
49 0x2b: ldq_l({{ Ra.uq = Mem.uq; }}, mem_flags = LOCKED);
50#ifdef USE_COPY
50 0x20: MiscPrefetch::copy_load({{ EA = Ra; }},
51 {{ fault = xc->copySrcTranslate(EA); }},
52 inst_flags = [IsMemRef, IsLoad, IsCopy]);
51 0x20: MiscPrefetch::copy_load({{ EA = Ra; }},
52 {{ fault = xc->copySrcTranslate(EA); }},
53 inst_flags = [IsMemRef, IsLoad, IsCopy]);
54#endif
53 }
54
55 format LoadOrPrefetch {
56 0x28: ldl({{ Ra.sl = Mem.sl; }});
57 0x29: ldq({{ Ra.uq = Mem.uq; }}, pf_flags = EVICT_NEXT);
58 // IsFloating flag on lds gets the prefetch to disassemble
59 // using f31 instead of r31... funcitonally it's unnecessary
60 0x22: lds({{ Fa.uq = s_to_t(Mem.ul); }},
61 pf_flags = PF_EXCLUSIVE, inst_flags = IsFloating);
62 }
63
64 format Store {
65 0x0e: stb({{ Mem.ub = Ra<7:0>; }});
66 0x0d: stw({{ Mem.uw = Ra<15:0>; }});
67 0x2c: stl({{ Mem.ul = Ra<31:0>; }});
68 0x2d: stq({{ Mem.uq = Ra.uq; }});
69 0x0f: stq_u({{ Mem.uq = Ra.uq; }}, {{ EA = (Rb + disp) & ~7; }});
70 0x26: sts({{ Mem.ul = t_to_s(Fa.uq); }});
71 0x27: stt({{ Mem.df = Fa; }});
55 }
56
57 format LoadOrPrefetch {
58 0x28: ldl({{ Ra.sl = Mem.sl; }});
59 0x29: ldq({{ Ra.uq = Mem.uq; }}, pf_flags = EVICT_NEXT);
60 // IsFloating flag on lds gets the prefetch to disassemble
61 // using f31 instead of r31... funcitonally it's unnecessary
62 0x22: lds({{ Fa.uq = s_to_t(Mem.ul); }},
63 pf_flags = PF_EXCLUSIVE, inst_flags = IsFloating);
64 }
65
66 format Store {
67 0x0e: stb({{ Mem.ub = Ra<7:0>; }});
68 0x0d: stw({{ Mem.uw = Ra<15:0>; }});
69 0x2c: stl({{ Mem.ul = Ra<31:0>; }});
70 0x2d: stq({{ Mem.uq = Ra.uq; }});
71 0x0f: stq_u({{ Mem.uq = Ra.uq; }}, {{ EA = (Rb + disp) & ~7; }});
72 0x26: sts({{ Mem.ul = t_to_s(Fa.uq); }});
73 0x27: stt({{ Mem.df = Fa; }});
74#ifdef USE_COPY
72 0x24: MiscPrefetch::copy_store({{ EA = Rb; }},
73 {{ fault = xc->copy(EA); }},
74 inst_flags = [IsMemRef, IsStore, IsCopy]);
75 0x24: MiscPrefetch::copy_store({{ EA = Rb; }},
76 {{ fault = xc->copy(EA); }},
77 inst_flags = [IsMemRef, IsStore, IsCopy]);
78#endif
75 }
76
77 format StoreCond {
78 0x2e: stl_c({{ Mem.ul = Ra<31:0>; }},
79 {{
80 uint64_t tmp = write_result;
81 // see stq_c
82 Ra = (tmp == 0 || tmp == 1) ? tmp : Ra;

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80
81 format StoreCond {
82 0x2e: stl_c({{ Mem.ul = Ra<31:0>; }},
83 {{
84 uint64_t tmp = write_result;
85 // see stq_c
86 Ra = (tmp == 0 || tmp == 1) ? tmp : Ra;

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