branch.isa (12106:7784fac1b159) branch.isa (12616:4b463b4dc098)
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2005 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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76
77 /// Constructor.
78 Branch(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
79 : PCDependentDisassembly(mnem, _machInst, __opClass),
80 disp(BRDISP << 2)
81 {
82 }
83
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2005 The Regents of The University of Michigan
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright

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76
77 /// Constructor.
78 Branch(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
79 : PCDependentDisassembly(mnem, _machInst, __opClass),
80 disp(BRDISP << 2)
81 {
82 }
83
84 AlphaISA::PCState branchTarget(const AlphaISA::PCState &branchPC) const;
84 AlphaISA::PCState branchTarget(
85 const AlphaISA::PCState &branchPC) const override;
85
86 /// Explicitly import the otherwise hidden branchTarget
87 using StaticInst::branchTarget;
88
86
87 /// Explicitly import the otherwise hidden branchTarget
88 using StaticInst::branchTarget;
89
89 std::string
90 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
90 std::string generateDisassembly(
91 Addr pc, const SymbolTable *symtab) const override;
91 };
92
93 /**
94 * Base class for jumps (register-indirect control transfers). In
95 * the Alpha ISA, these are always unconditional.
96 */
97 class Jump : public PCDependentDisassembly
98 {

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104 public:
105 /// Constructor
106 Jump(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
107 : PCDependentDisassembly(mnem, _machInst, __opClass),
108 disp(BRDISP)
109 {
110 }
111
92 };
93
94 /**
95 * Base class for jumps (register-indirect control transfers). In
96 * the Alpha ISA, these are always unconditional.
97 */
98 class Jump : public PCDependentDisassembly
99 {

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105 public:
106 /// Constructor
107 Jump(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
108 : PCDependentDisassembly(mnem, _machInst, __opClass),
109 disp(BRDISP)
110 {
111 }
112
112 AlphaISA::PCState branchTarget(ThreadContext *tc) const;
113 AlphaISA::PCState branchTarget(ThreadContext *tc) const override;
113
114 /// Explicitly import the otherwise hidden branchTarget
115 using StaticInst::branchTarget;
116
114
115 /// Explicitly import the otherwise hidden branchTarget
116 using StaticInst::branchTarget;
117
117 std::string
118 generateDisassembly(Addr pc, const SymbolTable *symtab) const;
118 std::string generateDisassembly(
119 Addr pc, const SymbolTable *symtab) const override;
119 };
120}};
121
122output decoder {{
123 AlphaISA::PCState
124 Branch::branchTarget(const AlphaISA::PCState &branchPC) const
125 {
126 return branchPC.pc() + 4 + disp;

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121}};
122
123output decoder {{
124 AlphaISA::PCState
125 Branch::branchTarget(const AlphaISA::PCState &branchPC) const
126 {
127 return branchPC.pc() + 4 + disp;

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