isa.hh (8229:78bf55f23338) | isa.hh (9384:877293183bdf) |
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1/* 2 * Copyright (c) 2009 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 24 unchanged lines hidden (view full) --- 33 34#include <cstring> 35#include <iostream> 36#include <string> 37 38#include "arch/alpha/registers.hh" 39#include "arch/alpha/types.hh" 40#include "base/types.hh" | 1/* 2 * Copyright (c) 2009 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 24 unchanged lines hidden (view full) --- 33 34#include <cstring> 35#include <iostream> 36#include <string> 37 38#include "arch/alpha/registers.hh" 39#include "arch/alpha/types.hh" 40#include "base/types.hh" |
41#include "sim/sim_object.hh" |
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41 | 42 |
43struct AlphaISAParams; |
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42class BaseCPU; 43class Checkpoint; 44class EventManager; 45class ThreadContext; 46 47namespace AlphaISA 48{ | 44class BaseCPU; 45class Checkpoint; 46class EventManager; 47class ThreadContext; 48 49namespace AlphaISA 50{ |
49 class ISA | 51 class ISA : public SimObject |
50 { 51 public: 52 typedef uint64_t InternalProcReg; | 52 { 53 public: 54 typedef uint64_t InternalProcReg; |
55 typedef AlphaISAParams Params; |
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53 54 protected: 55 uint64_t fpcr; // floating point condition codes 56 uint64_t uniq; // process-unique register 57 bool lock_flag; // lock flag for LL/SC 58 Addr lock_addr; // lock address for LL/SC 59 int intr_flag; 60 --- 35 unchanged lines hidden (view full) --- 96 } 97 98 int 99 flattenFloatIndex(int reg) 100 { 101 return reg; 102 } 103 | 56 57 protected: 58 uint64_t fpcr; // floating point condition codes 59 uint64_t uniq; // process-unique register 60 bool lock_flag; // lock flag for LL/SC 61 Addr lock_addr; // lock address for LL/SC 62 int intr_flag; 63 --- 35 unchanged lines hidden (view full) --- 99 } 100 101 int 102 flattenFloatIndex(int reg) 103 { 104 return reg; 105 } 106 |
104 ISA() 105 { 106 clear(); 107 initializeIprTable(); 108 } | 107 const Params *params() const; 108 109 ISA(Params *p); |
109 }; 110} 111 112#endif | 110 }; 111} 112 113#endif |