1/*
2 * Copyright (c) 2009 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __ARCH_ALPHA_ISA_HH__
32#define __ARCH_ALPHA_ISA_HH__
33
34#include "arch/alpha/miscregfile.hh"
35#include "arch/alpha/types.hh"
36
37class Checkpoint;
38class EventManager;
39
40namespace AlphaISA
41{
42 class ISA
43 {
44 protected:
45 MiscRegFile miscRegFile;
46
47 public:
48
49 void expandForMultithreading(ThreadID num_threads, unsigned num_vpes)
50 {
51 miscRegFile.expandForMultithreading(num_threads, num_vpes);
52 }
53
54 void reset(std::string core_name, ThreadID num_threads,
55 unsigned num_vpes, BaseCPU *_cpu)
56 {
57 miscRegFile.reset(core_name, num_threads, num_vpes, _cpu);
58 }
59
60 int instAsid()
61 {
62 return miscRegFile.getInstAsid();
63 }
64
65 int dataAsid()
66 {
67 return miscRegFile.getDataAsid();
68 }
69
70 void clear();
71
72 MiscReg readMiscRegNoEffect(int miscReg);
73 MiscReg readMiscReg(int miscReg, ThreadContext *tc);
74
75 void setMiscRegNoEffect(int miscReg, const MiscReg val);
76 void setMiscReg(int miscReg, const MiscReg val,
77 ThreadContext *tc);
78
79 int
80 flattenIntIndex(int reg)
81 {
82 return reg;
83 }
84
85 int
86 flattenFloatIndex(int reg)
87 {
88 return reg;
89 }
90
91 void serialize(std::ostream &os);
92 void unserialize(Checkpoint *cp, const std::string &section);
93
94 ISA()
95 {
96 clear();
97 }
98 };
99}
100
101#endif