isa.cc (10033:21c14a2b2117) | isa.cc (10698:829adc48e175) |
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1/* 2 * Copyright (c) 2009 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 60 unchanged lines hidden (view full) --- 69 UNSERIALIZE_SCALAR(uniq); 70 UNSERIALIZE_SCALAR(lock_flag); 71 UNSERIALIZE_SCALAR(lock_addr); 72 UNSERIALIZE_ARRAY(ipr, NumInternalProcRegs); 73} 74 75 76MiscReg | 1/* 2 * Copyright (c) 2009 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 60 unchanged lines hidden (view full) --- 69 UNSERIALIZE_SCALAR(uniq); 70 UNSERIALIZE_SCALAR(lock_flag); 71 UNSERIALIZE_SCALAR(lock_addr); 72 UNSERIALIZE_ARRAY(ipr, NumInternalProcRegs); 73} 74 75 76MiscReg |
77ISA::readMiscRegNoEffect(int misc_reg, ThreadID tid) | 77ISA::readMiscRegNoEffect(int misc_reg, ThreadID tid) const |
78{ 79 switch (misc_reg) { 80 case MISCREG_FPCR: 81 return fpcr; 82 case MISCREG_UNIQ: 83 return uniq; 84 case MISCREG_LOCKFLAG: 85 return lock_flag; --- 88 unchanged lines hidden --- | 78{ 79 switch (misc_reg) { 80 case MISCREG_FPCR: 81 return fpcr; 82 case MISCREG_UNIQ: 83 return uniq; 84 case MISCREG_LOCKFLAG: 85 return lock_flag; --- 88 unchanged lines hidden --- |