interrupts.hh (8232:b28d06a175be) interrupts.hh (9550:e0e2c8f83d08)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 144 unchanged lines hidden (view full) ---

153 if (tc->readMiscRegNoEffect(IPR_SIRR) & (ULL(1) << i)) {
154 // See table 4-19 of 21164 hardware reference
155 ipl = (i - INTLEVEL_SOFTWARE_MIN) + 1;
156 summary |= (ULL(1) << i);
157 }
158 }
159 }
160
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 144 unchanged lines hidden (view full) ---

153 if (tc->readMiscRegNoEffect(IPR_SIRR) & (ULL(1) << i)) {
154 // See table 4-19 of 21164 hardware reference
155 ipl = (i - INTLEVEL_SOFTWARE_MIN) + 1;
156 summary |= (ULL(1) << i);
157 }
158 }
159 }
160
161 uint64_t interrupts = intstatus;
162 if (interrupts) {
161 if (intstatus) {
163 for (uint64_t i = INTLEVEL_EXTERNAL_MIN;
164 i < INTLEVEL_EXTERNAL_MAX; i++) {
162 for (uint64_t i = INTLEVEL_EXTERNAL_MIN;
163 i < INTLEVEL_EXTERNAL_MAX; i++) {
165 if (interrupts & (ULL(1) << i)) {
164 if (intstatus & (ULL(1) << i)) {
166 // See table 4-19 of 21164 hardware reference
167 ipl = i;
168 summary |= (ULL(1) << i);
169 }
170 }
171 }
172
173 if (ipl && ipl > tc->readMiscRegNoEffect(IPR_IPLR)) {

--- 26 unchanged lines hidden --- 		165 // See table 4-19 of 21164 hardware reference
166 ipl = i;
167 summary |= (ULL(1) << i);
168 }
169 }
170 }
171
172 if (ipl && ipl > tc->readMiscRegNoEffect(IPR_IPLR)) {

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