interrupts.hh (7720:65d338a8dba4) interrupts.hh (8232:b28d06a175be)
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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32#ifndef __ARCH_ALPHA_INTERRUPT_HH__
33#define __ARCH_ALPHA_INTERRUPT_HH__
34
35#include "arch/alpha/faults.hh"
36#include "arch/alpha/isa_traits.hh"
37#include "base/compiler.hh"
38#include "base/trace.hh"
39#include "cpu/thread_context.hh"
1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 23 unchanged lines hidden (view full) ---

32#ifndef __ARCH_ALPHA_INTERRUPT_HH__
33#define __ARCH_ALPHA_INTERRUPT_HH__
34
35#include "arch/alpha/faults.hh"
36#include "arch/alpha/isa_traits.hh"
37#include "base/compiler.hh"
38#include "base/trace.hh"
39#include "cpu/thread_context.hh"
40#include "debug/Flow.hh"
41#include "debug/Interrupt.hh"
40#include "params/AlphaInterrupts.hh"
41#include "sim/sim_object.hh"
42
43namespace AlphaISA {
44
45class Interrupts : public SimObject
46{
47 private:

--- 150 unchanged lines hidden --- 		42#include "params/AlphaInterrupts.hh"
43#include "sim/sim_object.hh"
44
45namespace AlphaISA {
46
47class Interrupts : public SimObject
48{
49 private:

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