interrupts.hh (5568:d14250d688d2) | interrupts.hh (5646:0a488a147fb8) |
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1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 157 unchanged lines hidden (view full) --- 166 void 167 updateIntrInfo(ThreadContext *tc) 168 { 169 assert(newInfoSet); 170 tc->setMiscRegNoEffect(IPR_ISR, newSummary); 171 tc->setMiscRegNoEffect(IPR_INTID, newIpl); 172 newInfoSet = false; 173 } | 1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 157 unchanged lines hidden (view full) --- 166 void 167 updateIntrInfo(ThreadContext *tc) 168 { 169 assert(newInfoSet); 170 tc->setMiscRegNoEffect(IPR_ISR, newSummary); 171 tc->setMiscRegNoEffect(IPR_INTID, newIpl); 172 newInfoSet = false; 173 } |
174 175 uint64_t 176 get_vec(int int_num) 177 { 178 panic("Shouldn't be called for Alpha\n"); 179 M5_DUMMY_RETURN; 180 } | |
181}; 182 183} // namespace AlphaISA 184 185#endif // __ARCH_ALPHA_INTERRUPT_HH__ 186 | 174}; 175 176} // namespace AlphaISA 177 178#endif // __ARCH_ALPHA_INTERRUPT_HH__ 179 |