1/*
2 * Copyright (c) 2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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44 uint64_t interrupts[NumInterruptLevels];
45 uint64_t intstatus;
46
47 public:
48 Interrupts()
49 {
50 memset(interrupts, 0, sizeof(interrupts));
51 intstatus = 0;
52 newInfoSet = false;
53 }
54
55 void post(int int_num, int index)
56 {
57 DPRINTF(Interrupt, "Interrupt %d:%d posted\n", int_num, index);
58
59 if (int_num < 0 || int_num >= NumInterruptLevels)
60 panic("int_num out of bounds\n");

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133 // See table 4-19 of 21164 hardware reference
134 ipl = i;
135 summary |= (ULL(1) << i);
136 }
137 }
138 }
139
140 if (ipl && ipl > tc->readMiscReg(IPR_IPLR)) {
141// assert(!newInfoSet);
142 newIpl = ipl;
143 newSummary = newSummary;
144 newInfoSet = true;
145 DPRINTF(Flow, "Interrupt! IPLR=%d ipl=%d summary=%x\n",
146 tc->readMiscReg(IPR_IPLR), ipl, summary);
147
148 return new InterruptFault;
149 } else {
150 return NoFault;
151 }
152 }
153
154 void updateIntrInfo(ThreadContext *tc)
155 {
156 assert(newInfoSet);
157 tc->setMiscReg(IPR_ISR, newSummary);
158 tc->setMiscReg(IPR_INTID, newIpl);
159 newInfoSet = false;
160 }
161
162 private:
163 bool newInfoSet;
164 int newIpl;
165 int newSummary;
166 };
167}
168
169#endif
170