faults.hh (4695:a63378aed062) | faults.hh (4997:e7380529bd2d) |
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1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 21 unchanged lines hidden (view full) --- 30 */ 31 32#ifndef __ALPHA_FAULTS_HH__ 33#define __ALPHA_FAULTS_HH__ 34 35#include "config/full_system.hh" 36#include "sim/faults.hh" 37 | 1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 21 unchanged lines hidden (view full) --- 30 */ 31 32#ifndef __ALPHA_FAULTS_HH__ 33#define __ALPHA_FAULTS_HH__ 34 35#include "config/full_system.hh" 36#include "sim/faults.hh" 37 |
38#if FULL_SYSTEM | |
39#include "arch/alpha/pagetable.hh" | 38#include "arch/alpha/pagetable.hh" |
40#endif | |
41 42// The design of the "name" and "vect" functions is in sim/faults.hh 43 44namespace AlphaISA 45{ 46 47typedef const Addr FaultVect; 48 --- 86 unchanged lines hidden (view full) --- 135 public: 136 FaultName name() const {return _name;} 137 FaultVect vect() {return _vect;} 138 FaultStat & countStat() {return _count;} 139}; 140 141class DtbFault : public AlphaFault 142{ | 39 40// The design of the "name" and "vect" functions is in sim/faults.hh 41 42namespace AlphaISA 43{ 44 45typedef const Addr FaultVect; 46 --- 86 unchanged lines hidden (view full) --- 133 public: 134 FaultName name() const {return _name;} 135 FaultVect vect() {return _vect;} 136 FaultStat & countStat() {return _count;} 137}; 138 139class DtbFault : public AlphaFault 140{ |
143#if FULL_SYSTEM 144 private: | 141 protected: |
145 AlphaISA::VAddr vaddr; 146 uint32_t reqFlags; 147 uint64_t flags; 148 public: 149 DtbFault(AlphaISA::VAddr _vaddr, uint32_t _reqFlags, uint64_t _flags) 150 : vaddr(_vaddr), reqFlags(_reqFlags), flags(_flags) 151 { } | 142 AlphaISA::VAddr vaddr; 143 uint32_t reqFlags; 144 uint64_t flags; 145 public: 146 DtbFault(AlphaISA::VAddr _vaddr, uint32_t _reqFlags, uint64_t _flags) 147 : vaddr(_vaddr), reqFlags(_reqFlags), flags(_flags) 148 { } |
152#endif | |
153 FaultName name() const = 0; 154 FaultVect vect() = 0; 155 FaultStat & countStat() = 0; 156#if FULL_SYSTEM 157 void invoke(ThreadContext * tc); 158#endif 159}; 160 161class NDtbMissFault : public DtbFault 162{ 163 private: 164 static FaultName _name; 165 static FaultVect _vect; 166 static FaultStat _count; 167 public: | 149 FaultName name() const = 0; 150 FaultVect vect() = 0; 151 FaultStat & countStat() = 0; 152#if FULL_SYSTEM 153 void invoke(ThreadContext * tc); 154#endif 155}; 156 157class NDtbMissFault : public DtbFault 158{ 159 private: 160 static FaultName _name; 161 static FaultVect _vect; 162 static FaultStat _count; 163 public: |
168#if FULL_SYSTEM | |
169 NDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 170 : DtbFault(vaddr, reqFlags, flags) 171 { } | 164 NDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 165 : DtbFault(vaddr, reqFlags, flags) 166 { } |
172#endif | |
173 FaultName name() const {return _name;} 174 FaultVect vect() {return _vect;} 175 FaultStat & countStat() {return _count;} | 167 FaultName name() const {return _name;} 168 FaultVect vect() {return _vect;} 169 FaultStat & countStat() {return _count;} |
170#if !FULL_SYSTEM 171 void invoke(ThreadContext * tc); 172#endif |
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176}; 177 178class PDtbMissFault : public DtbFault 179{ 180 private: 181 static FaultName _name; 182 static FaultVect _vect; 183 static FaultStat _count; 184 public: | 173}; 174 175class PDtbMissFault : public DtbFault 176{ 177 private: 178 static FaultName _name; 179 static FaultVect _vect; 180 static FaultStat _count; 181 public: |
185#if FULL_SYSTEM | |
186 PDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 187 : DtbFault(vaddr, reqFlags, flags) 188 { } | 182 PDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 183 : DtbFault(vaddr, reqFlags, flags) 184 { } |
189#endif | |
190 FaultName name() const {return _name;} 191 FaultVect vect() {return _vect;} 192 FaultStat & countStat() {return _count;} 193}; 194 195class DtbPageFault : public DtbFault 196{ 197 private: 198 static FaultName _name; 199 static FaultVect _vect; 200 static FaultStat _count; 201 public: | 185 FaultName name() const {return _name;} 186 FaultVect vect() {return _vect;} 187 FaultStat & countStat() {return _count;} 188}; 189 190class DtbPageFault : public DtbFault 191{ 192 private: 193 static FaultName _name; 194 static FaultVect _vect; 195 static FaultStat _count; 196 public: |
202#if FULL_SYSTEM | |
203 DtbPageFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 204 : DtbFault(vaddr, reqFlags, flags) 205 { } | 197 DtbPageFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 198 : DtbFault(vaddr, reqFlags, flags) 199 { } |
206#endif | |
207 FaultName name() const {return _name;} 208 FaultVect vect() {return _vect;} 209 FaultStat & countStat() {return _count;} 210}; 211 212class DtbAcvFault : public DtbFault 213{ 214 private: 215 static FaultName _name; 216 static FaultVect _vect; 217 static FaultStat _count; 218 public: | 200 FaultName name() const {return _name;} 201 FaultVect vect() {return _vect;} 202 FaultStat & countStat() {return _count;} 203}; 204 205class DtbAcvFault : public DtbFault 206{ 207 private: 208 static FaultName _name; 209 static FaultVect _vect; 210 static FaultStat _count; 211 public: |
219#if FULL_SYSTEM | |
220 DtbAcvFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 221 : DtbFault(vaddr, reqFlags, flags) 222 { } | 212 DtbAcvFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 213 : DtbFault(vaddr, reqFlags, flags) 214 { } |
223#endif | |
224 FaultName name() const {return _name;} 225 FaultVect vect() {return _vect;} 226 FaultStat & countStat() {return _count;} 227}; 228 229class DtbAlignmentFault : public DtbFault 230{ 231 private: 232 static FaultName _name; 233 static FaultVect _vect; 234 static FaultStat _count; 235 public: | 215 FaultName name() const {return _name;} 216 FaultVect vect() {return _vect;} 217 FaultStat & countStat() {return _count;} 218}; 219 220class DtbAlignmentFault : public DtbFault 221{ 222 private: 223 static FaultName _name; 224 static FaultVect _vect; 225 static FaultStat _count; 226 public: |
236#if FULL_SYSTEM | |
237 DtbAlignmentFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 238 : DtbFault(vaddr, reqFlags, flags) 239 { } | 227 DtbAlignmentFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags) 228 : DtbFault(vaddr, reqFlags, flags) 229 { } |
240#endif | |
241 FaultName name() const {return _name;} 242 FaultVect vect() {return _vect;} 243 FaultStat & countStat() {return _count;} 244}; 245 246class ItbFault : public AlphaFault 247{ | 230 FaultName name() const {return _name;} 231 FaultVect vect() {return _vect;} 232 FaultStat & countStat() {return _count;} 233}; 234 235class ItbFault : public AlphaFault 236{ |
248 private: | 237 protected: |
249 Addr pc; 250 public: 251 ItbFault(Addr _pc) 252 : pc(_pc) 253 { } 254 FaultName name() const = 0; 255 FaultVect vect() = 0; 256 FaultStat & countStat() = 0; 257#if FULL_SYSTEM 258 void invoke(ThreadContext * tc); 259#endif 260}; 261 | 238 Addr pc; 239 public: 240 ItbFault(Addr _pc) 241 : pc(_pc) 242 { } 243 FaultName name() const = 0; 244 FaultVect vect() = 0; 245 FaultStat & countStat() = 0; 246#if FULL_SYSTEM 247 void invoke(ThreadContext * tc); 248#endif 249}; 250 |
262class ItbMissFault : public ItbFault 263{ 264 private: 265 static FaultName _name; 266 static FaultVect _vect; 267 static FaultStat _count; 268 public: 269 ItbMissFault(Addr pc) 270 : ItbFault(pc) 271 { } 272 FaultName name() const {return _name;} 273 FaultVect vect() {return _vect;} 274 FaultStat & countStat() {return _count;} 275}; 276 | |
277class ItbPageFault : public ItbFault 278{ 279 private: 280 static FaultName _name; 281 static FaultVect _vect; 282 static FaultStat _count; 283 public: 284 ItbPageFault(Addr pc) 285 : ItbFault(pc) 286 { } 287 FaultName name() const {return _name;} 288 FaultVect vect() {return _vect;} 289 FaultStat & countStat() {return _count;} | 251class ItbPageFault : public ItbFault 252{ 253 private: 254 static FaultName _name; 255 static FaultVect _vect; 256 static FaultStat _count; 257 public: 258 ItbPageFault(Addr pc) 259 : ItbFault(pc) 260 { } 261 FaultName name() const {return _name;} 262 FaultVect vect() {return _vect;} 263 FaultStat & countStat() {return _count;} |
264#if !FULL_SYSTEM 265 void invoke(ThreadContext * tc); 266#endif |
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290}; 291 292class ItbAcvFault : public ItbFault 293{ 294 private: 295 static FaultName _name; 296 static FaultVect _vect; 297 static FaultStat _count; --- 62 unchanged lines hidden --- | 267}; 268 269class ItbAcvFault : public ItbFault 270{ 271 private: 272 static FaultName _name; 273 static FaultVect _vect; 274 static FaultStat _count; --- 62 unchanged lines hidden --- |