1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Kevin Lim
30 */
31
32#ifndef __ARCH_ALPHA_FAULTS_HH__
33#define __ARCH_ALPHA_FAULTS_HH__
34
35#include "arch/alpha/pagetable.hh"
36#include "config/full_system.hh"
36#include "mem/request.hh"
37#include "sim/faults.hh"
38
39// The design of the "name" and "vect" functions is in sim/faults.hh
40
41namespace AlphaISA {
42
43typedef const Addr FaultVect;
44
45class AlphaFault : public FaultBase
46{
47 protected:
48 virtual bool skipFaultingInstruction() {return false;}
49 virtual bool setRestartAddress() {return true;}
50 public:
52#if FULL_SYSTEM
51 void invoke(ThreadContext * tc,
52 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
55#endif
53 virtual FaultVect vect() = 0;
54 virtual FaultStat & countStat() = 0;
55};
56
57class MachineCheckFault : public AlphaFault
58{
59 private:
60 static FaultName _name;
61 static FaultVect _vect;
62 static FaultStat _count;
63
64 public:
65 FaultName name() const {return _name;}
66 FaultVect vect() {return _vect;}
67 FaultStat & countStat() {return _count;}
68};
69
70class AlignmentFault : public AlphaFault
71{
72 private:
73 static FaultName _name;
74 static FaultVect _vect;
75 static FaultStat _count;
76
77 public:
78 FaultName name() const {return _name;}
79 FaultVect vect() {return _vect;}
80 FaultStat & countStat() {return _count;}
81 bool isAlignmentFault() const {return true;}
82};
83
84class ResetFault : public AlphaFault
85{
86 private:
87 static FaultName _name;
88 static FaultVect _vect;
89 static FaultStat _count;
90
91 public:
92 FaultName name() const {return _name;}
93 FaultVect vect() {return _vect;}
94 FaultStat & countStat() {return _count;}
95};
96
97class ArithmeticFault : public AlphaFault
98{
99 private:
100 static FaultName _name;
101 static FaultVect _vect;
102 static FaultStat _count;
103
104 protected:
105 bool skipFaultingInstruction() {return true;}
106
107 public:
108 FaultName name() const {return _name;}
109 FaultVect vect() {return _vect;}
110 FaultStat & countStat() {return _count;}
114#if FULL_SYSTEM
111 void invoke(ThreadContext * tc,
112 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
117#endif
113};
114
115class InterruptFault : public AlphaFault
116{
117 private:
118 static FaultName _name;
119 static FaultVect _vect;
120 static FaultStat _count;
121
122 protected:
123 bool setRestartAddress() {return false;}
124
125 public:
126 FaultName name() const {return _name;}
127 FaultVect vect() {return _vect;}
128 FaultStat & countStat() {return _count;}
129};
130
131class DtbFault : public AlphaFault
132{
133 protected:
134 VAddr vaddr;
135 Request::Flags reqFlags;
136 uint64_t flags;
137
138 public:
139 DtbFault(VAddr _vaddr, Request::Flags _reqFlags, uint64_t _flags)
140 : vaddr(_vaddr), reqFlags(_reqFlags), flags(_flags)
141 { }
142 FaultName name() const = 0;
143 FaultVect vect() = 0;
144 FaultStat & countStat() = 0;
150#if FULL_SYSTEM
145 void invoke(ThreadContext * tc,
146 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
153#endif
147};
148
149class NDtbMissFault : public DtbFault
150{
151 private:
152 static FaultName _name;
153 static FaultVect _vect;
154 static FaultStat _count;
155
156 public:
157 NDtbMissFault(VAddr vaddr, Request::Flags reqFlags, uint64_t flags)
158 : DtbFault(vaddr, reqFlags, flags)
159 { }
160 FaultName name() const {return _name;}
161 FaultVect vect() {return _vect;}
162 FaultStat & countStat() {return _count;}
170#if !FULL_SYSTEM
163 void invoke(ThreadContext * tc,
164 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
173#endif
165};
166
167class PDtbMissFault : public DtbFault
168{
169 private:
170 static FaultName _name;
171 static FaultVect _vect;
172 static FaultStat _count;
173
174 public:
175 PDtbMissFault(VAddr vaddr, Request::Flags reqFlags, uint64_t flags)
176 : DtbFault(vaddr, reqFlags, flags)
177 { }
178 FaultName name() const {return _name;}
179 FaultVect vect() {return _vect;}
180 FaultStat & countStat() {return _count;}
181};
182
183class DtbPageFault : public DtbFault
184{
185 private:
186 static FaultName _name;
187 static FaultVect _vect;
188 static FaultStat _count;
189
190 public:
191 DtbPageFault(VAddr vaddr, Request::Flags reqFlags, uint64_t flags)
192 : DtbFault(vaddr, reqFlags, flags)
193 { }
194 FaultName name() const {return _name;}
195 FaultVect vect() {return _vect;}
196 FaultStat & countStat() {return _count;}
197};
198
199class DtbAcvFault : public DtbFault
200{
201 private:
202 static FaultName _name;
203 static FaultVect _vect;
204 static FaultStat _count;
205
206 public:
207 DtbAcvFault(VAddr vaddr, Request::Flags reqFlags, uint64_t flags)
208 : DtbFault(vaddr, reqFlags, flags)
209 { }
210 FaultName name() const {return _name;}
211 FaultVect vect() {return _vect;}
212 FaultStat & countStat() {return _count;}
213};
214
215class DtbAlignmentFault : public DtbFault
216{
217 private:
218 static FaultName _name;
219 static FaultVect _vect;
220 static FaultStat _count;
221
222 public:
223 DtbAlignmentFault(VAddr vaddr, Request::Flags reqFlags, uint64_t flags)
224 : DtbFault(vaddr, reqFlags, flags)
225 { }
226 FaultName name() const {return _name;}
227 FaultVect vect() {return _vect;}
228 FaultStat & countStat() {return _count;}
229};
230
231class ItbFault : public AlphaFault
232{
233 protected:
234 Addr pc;
235
236 public:
237 ItbFault(Addr _pc) : pc(_pc) { }
238 FaultName name() const = 0;
239 FaultVect vect() = 0;
240 FaultStat & countStat() = 0;
250#if FULL_SYSTEM
241 void invoke(ThreadContext * tc,
242 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
253#endif
243};
244
245class ItbPageFault : public ItbFault
246{
247 private:
248 static FaultName _name;
249 static FaultVect _vect;
250 static FaultStat _count;
251
252 public:
253 ItbPageFault(Addr pc) : ItbFault(pc) { }
254 FaultName name() const {return _name;}
255 FaultVect vect() {return _vect;}
256 FaultStat & countStat() {return _count;}
268#if !FULL_SYSTEM
257 void invoke(ThreadContext * tc,
258 StaticInstPtr inst = StaticInst::nullStaticInstPtr);
271#endif
259};
260
261class ItbAcvFault : public ItbFault
262{
263 private:
264 static FaultName _name;
265 static FaultVect _vect;
266 static FaultStat _count;
267
268 public:
269 ItbAcvFault(Addr pc) : ItbFault(pc) { }
270 FaultName name() const {return _name;}
271 FaultVect vect() {return _vect;}
272 FaultStat & countStat() {return _count;}
273};
274
275class UnimplementedOpcodeFault : public AlphaFault
276{
277 private:
278 static FaultName _name;
279 static FaultVect _vect;
280 static FaultStat _count;
281
282 public:
283 FaultName name() const {return _name;}
284 FaultVect vect() {return _vect;}
285 FaultStat & countStat() {return _count;}
286};
287
288class FloatEnableFault : public AlphaFault
289{
290 private:
291 static FaultName _name;
292 static FaultVect _vect;
293 static FaultStat _count;
294
295 public:
296 FaultName name() const {return _name;}
297 FaultVect vect() {return _vect;}
298 FaultStat & countStat() {return _count;}
299};
300
301class PalFault : public AlphaFault
302{
303 private:
304 static FaultName _name;
305 static FaultVect _vect;
306 static FaultStat _count;
307
308 protected:
309 bool skipFaultingInstruction() {return true;}
310
311 public:
312 FaultName name() const {return _name;}
313 FaultVect vect() {return _vect;}
314 FaultStat & countStat() {return _count;}
315};
316
317class IntegerOverflowFault : public AlphaFault
318{
319 private:
320 static FaultName _name;
321 static FaultVect _vect;
322 static FaultStat _count;
323
324 public:
325 FaultName name() const {return _name;}
326 FaultVect vect() {return _vect;}
327 FaultStat & countStat() {return _count;}
328};
329
330} // namespace AlphaISA
331
332#endif // __ARCH_ALPHA_FAULTS_HH__