1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Kevin Lim
30 */
31
32#ifndef __ALPHA_FAULTS_HH__
33#define __ALPHA_FAULTS_HH__
34
35#include "config/full_system.hh"
36#include "sim/faults.hh"
37
38#if FULL_SYSTEM
38#include "arch/alpha/pagetable.hh"
40#endif
39
40// The design of the "name" and "vect" functions is in sim/faults.hh
41
42namespace AlphaISA
43{
44
45typedef const Addr FaultVect;
46
47class AlphaFault : public FaultBase
48{
49 protected:
50 virtual bool skipFaultingInstruction() {return false;}
51 virtual bool setRestartAddress() {return true;}
52 public:
53#if FULL_SYSTEM
54 void invoke(ThreadContext * tc);
55#endif
56 virtual FaultVect vect() = 0;
57 virtual FaultStat & countStat() = 0;
58};
59
60class MachineCheckFault : public AlphaFault
61{
62 private:
63 static FaultName _name;
64 static FaultVect _vect;
65 static FaultStat _count;
66 public:
67 FaultName name() const {return _name;}
68 FaultVect vect() {return _vect;}
69 FaultStat & countStat() {return _count;}
70 bool isMachineCheckFault() const {return true;}
71};
72
73class AlignmentFault : public AlphaFault
74{
75 private:
76 static FaultName _name;
77 static FaultVect _vect;
78 static FaultStat _count;
79 public:
80 FaultName name() const {return _name;}
81 FaultVect vect() {return _vect;}
82 FaultStat & countStat() {return _count;}
83 bool isAlignmentFault() const {return true;}
84};
85
86static inline Fault genMachineCheckFault()
87{
88 return new MachineCheckFault;
89}
90
91static inline Fault genAlignmentFault()
92{
93 return new AlignmentFault;
94}
95
96class ResetFault : public AlphaFault
97{
98 private:
99 static FaultName _name;
100 static FaultVect _vect;
101 static FaultStat _count;
102 public:
103 FaultName name() const {return _name;}
104 FaultVect vect() {return _vect;}
105 FaultStat & countStat() {return _count;}
106};
107
108class ArithmeticFault : public AlphaFault
109{
110 protected:
111 bool skipFaultingInstruction() {return true;}
112 private:
113 static FaultName _name;
114 static FaultVect _vect;
115 static FaultStat _count;
116 public:
117 FaultName name() const {return _name;}
118 FaultVect vect() {return _vect;}
119 FaultStat & countStat() {return _count;}
120#if FULL_SYSTEM
121 void invoke(ThreadContext * tc);
122#endif
123};
124
125class InterruptFault : public AlphaFault
126{
127 protected:
128 bool setRestartAddress() {return false;}
129 private:
130 static FaultName _name;
131 static FaultVect _vect;
132 static FaultStat _count;
133 public:
134 FaultName name() const {return _name;}
135 FaultVect vect() {return _vect;}
136 FaultStat & countStat() {return _count;}
137};
138
139class DtbFault : public AlphaFault
140{
143#if FULL_SYSTEM
144 private:
141 protected:
142 AlphaISA::VAddr vaddr;
143 uint32_t reqFlags;
144 uint64_t flags;
145 public:
146 DtbFault(AlphaISA::VAddr _vaddr, uint32_t _reqFlags, uint64_t _flags)
147 : vaddr(_vaddr), reqFlags(_reqFlags), flags(_flags)
148 { }
152#endif
149 FaultName name() const = 0;
150 FaultVect vect() = 0;
151 FaultStat & countStat() = 0;
152#if FULL_SYSTEM
153 void invoke(ThreadContext * tc);
154#endif
155};
156
157class NDtbMissFault : public DtbFault
158{
159 private:
160 static FaultName _name;
161 static FaultVect _vect;
162 static FaultStat _count;
163 public:
168#if FULL_SYSTEM
164 NDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
165 : DtbFault(vaddr, reqFlags, flags)
166 { }
172#endif
167 FaultName name() const {return _name;}
168 FaultVect vect() {return _vect;}
169 FaultStat & countStat() {return _count;}
170#if !FULL_SYSTEM
171 void invoke(ThreadContext * tc);
172#endif
173};
174
175class PDtbMissFault : public DtbFault
176{
177 private:
178 static FaultName _name;
179 static FaultVect _vect;
180 static FaultStat _count;
181 public:
185#if FULL_SYSTEM
182 PDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
183 : DtbFault(vaddr, reqFlags, flags)
184 { }
189#endif
185 FaultName name() const {return _name;}
186 FaultVect vect() {return _vect;}
187 FaultStat & countStat() {return _count;}
188};
189
190class DtbPageFault : public DtbFault
191{
192 private:
193 static FaultName _name;
194 static FaultVect _vect;
195 static FaultStat _count;
196 public:
202#if FULL_SYSTEM
197 DtbPageFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
198 : DtbFault(vaddr, reqFlags, flags)
199 { }
206#endif
200 FaultName name() const {return _name;}
201 FaultVect vect() {return _vect;}
202 FaultStat & countStat() {return _count;}
203};
204
205class DtbAcvFault : public DtbFault
206{
207 private:
208 static FaultName _name;
209 static FaultVect _vect;
210 static FaultStat _count;
211 public:
219#if FULL_SYSTEM
212 DtbAcvFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
213 : DtbFault(vaddr, reqFlags, flags)
214 { }
223#endif
215 FaultName name() const {return _name;}
216 FaultVect vect() {return _vect;}
217 FaultStat & countStat() {return _count;}
218};
219
220class DtbAlignmentFault : public DtbFault
221{
222 private:
223 static FaultName _name;
224 static FaultVect _vect;
225 static FaultStat _count;
226 public:
236#if FULL_SYSTEM
227 DtbAlignmentFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
228 : DtbFault(vaddr, reqFlags, flags)
229 { }
240#endif
230 FaultName name() const {return _name;}
231 FaultVect vect() {return _vect;}
232 FaultStat & countStat() {return _count;}
233};
234
235class ItbFault : public AlphaFault
236{
248 private:
237 protected:
238 Addr pc;
239 public:
240 ItbFault(Addr _pc)
241 : pc(_pc)
242 { }
243 FaultName name() const = 0;
244 FaultVect vect() = 0;
245 FaultStat & countStat() = 0;
246#if FULL_SYSTEM
247 void invoke(ThreadContext * tc);
248#endif
249};
250
262class ItbMissFault : public ItbFault
263{
264 private:
265 static FaultName _name;
266 static FaultVect _vect;
267 static FaultStat _count;
268 public:
269 ItbMissFault(Addr pc)
270 : ItbFault(pc)
271 { }
272 FaultName name() const {return _name;}
273 FaultVect vect() {return _vect;}
274 FaultStat & countStat() {return _count;}
275};
276
251class ItbPageFault : public ItbFault
252{
253 private:
254 static FaultName _name;
255 static FaultVect _vect;
256 static FaultStat _count;
257 public:
258 ItbPageFault(Addr pc)
259 : ItbFault(pc)
260 { }
261 FaultName name() const {return _name;}
262 FaultVect vect() {return _vect;}
263 FaultStat & countStat() {return _count;}
264#if !FULL_SYSTEM
265 void invoke(ThreadContext * tc);
266#endif
267};
268
269class ItbAcvFault : public ItbFault
270{
271 private:
272 static FaultName _name;
273 static FaultVect _vect;
274 static FaultStat _count;
275 public:
276 ItbAcvFault(Addr pc)
277 : ItbFault(pc)
278 { }
279 FaultName name() const {return _name;}
280 FaultVect vect() {return _vect;}
281 FaultStat & countStat() {return _count;}
282};
283
284class UnimplementedOpcodeFault : public AlphaFault
285{
286 private:
287 static FaultName _name;
288 static FaultVect _vect;
289 static FaultStat _count;
290 public:
291 FaultName name() const {return _name;}
292 FaultVect vect() {return _vect;}
293 FaultStat & countStat() {return _count;}
294};
295
296class FloatEnableFault : public AlphaFault
297{
298 private:
299 static FaultName _name;
300 static FaultVect _vect;
301 static FaultStat _count;
302 public:
303 FaultName name() const {return _name;}
304 FaultVect vect() {return _vect;}
305 FaultStat & countStat() {return _count;}
306};
307
308class PalFault : public AlphaFault
309{
310 protected:
311 bool skipFaultingInstruction() {return true;}
312 private:
313 static FaultName _name;
314 static FaultVect _vect;
315 static FaultStat _count;
316 public:
317 FaultName name() const {return _name;}
318 FaultVect vect() {return _vect;}
319 FaultStat & countStat() {return _count;}
320};
321
322class IntegerOverflowFault : public AlphaFault
323{
324 private:
325 static FaultName _name;
326 static FaultVect _vect;
327 static FaultStat _count;
328 public:
329 FaultName name() const {return _name;}
330 FaultVect vect() {return _vect;}
331 FaultStat & countStat() {return _count;}
332};
333
334} // AlphaISA namespace
335
336#endif // __FAULTS_HH__