1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Kevin Lim
30 */
31
32#ifndef __ALPHA_FAULTS_HH__
33#define __ALPHA_FAULTS_HH__
34
35#include "config/full_system.hh"
36#include "sim/faults.hh"
37
38#include "arch/alpha/pagetable.hh"
39
40// The design of the "name" and "vect" functions is in sim/faults.hh
41
42namespace AlphaISA
43{
44
45typedef const Addr FaultVect;
46
47class AlphaFault : public FaultBase
48{
49 protected:
50 virtual bool skipFaultingInstruction() {return false;}
51 virtual bool setRestartAddress() {return true;}
52 public:
53#if FULL_SYSTEM
54 void invoke(ThreadContext * tc);
55#endif
56 virtual FaultVect vect() = 0;
57 virtual FaultStat & countStat() = 0;
58};
59
60class MachineCheckFault : public AlphaFault
61{
62 private:
63 static FaultName _name;
64 static FaultVect _vect;
65 static FaultStat _count;
66 public:
67 FaultName name() const {return _name;}
68 FaultVect vect() {return _vect;}
69 FaultStat & countStat() {return _count;}
70 bool isMachineCheckFault() const {return true;}
71};
72
73class AlignmentFault : public AlphaFault
74{
75 private:
76 static FaultName _name;
77 static FaultVect _vect;
78 static FaultStat _count;
79 public:
80 FaultName name() const {return _name;}
81 FaultVect vect() {return _vect;}
82 FaultStat & countStat() {return _count;}
83 bool isAlignmentFault() const {return true;}
84};
85
86static inline Fault genMachineCheckFault()
87{
88 return new MachineCheckFault;
89}
90
91class ResetFault : public AlphaFault
92{
93 private:
94 static FaultName _name;
95 static FaultVect _vect;
96 static FaultStat _count;
97 public:
98 FaultName name() const {return _name;}
99 FaultVect vect() {return _vect;}
100 FaultStat & countStat() {return _count;}
101};
102
103class ArithmeticFault : public AlphaFault
104{
105 protected:
106 bool skipFaultingInstruction() {return true;}
107 private:
108 static FaultName _name;
109 static FaultVect _vect;
110 static FaultStat _count;
111 public:
112 FaultName name() const {return _name;}
113 FaultVect vect() {return _vect;}
114 FaultStat & countStat() {return _count;}
115#if FULL_SYSTEM
116 void invoke(ThreadContext * tc);
117#endif
118};
119
120class InterruptFault : public AlphaFault
121{
122 protected:
123 bool setRestartAddress() {return false;}
124 private:
125 static FaultName _name;
126 static FaultVect _vect;
127 static FaultStat _count;
128 public:
129 FaultName name() const {return _name;}
130 FaultVect vect() {return _vect;}
131 FaultStat & countStat() {return _count;}
132};
133
134class DtbFault : public AlphaFault
135{
136 protected:
| 1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 * Kevin Lim
30 */
31
32#ifndef __ALPHA_FAULTS_HH__
33#define __ALPHA_FAULTS_HH__
34
35#include "config/full_system.hh"
36#include "sim/faults.hh"
37
38#include "arch/alpha/pagetable.hh"
39
40// The design of the "name" and "vect" functions is in sim/faults.hh
41
42namespace AlphaISA
43{
44
45typedef const Addr FaultVect;
46
47class AlphaFault : public FaultBase
48{
49 protected:
50 virtual bool skipFaultingInstruction() {return false;}
51 virtual bool setRestartAddress() {return true;}
52 public:
53#if FULL_SYSTEM
54 void invoke(ThreadContext * tc);
55#endif
56 virtual FaultVect vect() = 0;
57 virtual FaultStat & countStat() = 0;
58};
59
60class MachineCheckFault : public AlphaFault
61{
62 private:
63 static FaultName _name;
64 static FaultVect _vect;
65 static FaultStat _count;
66 public:
67 FaultName name() const {return _name;}
68 FaultVect vect() {return _vect;}
69 FaultStat & countStat() {return _count;}
70 bool isMachineCheckFault() const {return true;}
71};
72
73class AlignmentFault : public AlphaFault
74{
75 private:
76 static FaultName _name;
77 static FaultVect _vect;
78 static FaultStat _count;
79 public:
80 FaultName name() const {return _name;}
81 FaultVect vect() {return _vect;}
82 FaultStat & countStat() {return _count;}
83 bool isAlignmentFault() const {return true;}
84};
85
86static inline Fault genMachineCheckFault()
87{
88 return new MachineCheckFault;
89}
90
91class ResetFault : public AlphaFault
92{
93 private:
94 static FaultName _name;
95 static FaultVect _vect;
96 static FaultStat _count;
97 public:
98 FaultName name() const {return _name;}
99 FaultVect vect() {return _vect;}
100 FaultStat & countStat() {return _count;}
101};
102
103class ArithmeticFault : public AlphaFault
104{
105 protected:
106 bool skipFaultingInstruction() {return true;}
107 private:
108 static FaultName _name;
109 static FaultVect _vect;
110 static FaultStat _count;
111 public:
112 FaultName name() const {return _name;}
113 FaultVect vect() {return _vect;}
114 FaultStat & countStat() {return _count;}
115#if FULL_SYSTEM
116 void invoke(ThreadContext * tc);
117#endif
118};
119
120class InterruptFault : public AlphaFault
121{
122 protected:
123 bool setRestartAddress() {return false;}
124 private:
125 static FaultName _name;
126 static FaultVect _vect;
127 static FaultStat _count;
128 public:
129 FaultName name() const {return _name;}
130 FaultVect vect() {return _vect;}
131 FaultStat & countStat() {return _count;}
132};
133
134class DtbFault : public AlphaFault
135{
136 protected:
|
137 AlphaISA::VAddr vaddr;
| 137 VAddr vaddr;
|
138 uint32_t reqFlags;
139 uint64_t flags;
140 public:
| 138 uint32_t reqFlags;
139 uint64_t flags;
140 public:
|
141 DtbFault(AlphaISA::VAddr _vaddr, uint32_t _reqFlags, uint64_t _flags)
| 141 DtbFault(VAddr _vaddr, uint32_t _reqFlags, uint64_t _flags)
|
142 : vaddr(_vaddr), reqFlags(_reqFlags), flags(_flags)
143 { }
144 FaultName name() const = 0;
145 FaultVect vect() = 0;
146 FaultStat & countStat() = 0;
147#if FULL_SYSTEM
148 void invoke(ThreadContext * tc);
149#endif
150};
151
152class NDtbMissFault : public DtbFault
153{
154 private:
155 static FaultName _name;
156 static FaultVect _vect;
157 static FaultStat _count;
158 public:
| 142 : vaddr(_vaddr), reqFlags(_reqFlags), flags(_flags)
143 { }
144 FaultName name() const = 0;
145 FaultVect vect() = 0;
146 FaultStat & countStat() = 0;
147#if FULL_SYSTEM
148 void invoke(ThreadContext * tc);
149#endif
150};
151
152class NDtbMissFault : public DtbFault
153{
154 private:
155 static FaultName _name;
156 static FaultVect _vect;
157 static FaultStat _count;
158 public:
|
159 NDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
| 159 NDtbMissFault(VAddr vaddr, uint32_t reqFlags, uint64_t flags)
|
160 : DtbFault(vaddr, reqFlags, flags)
161 { }
162 FaultName name() const {return _name;}
163 FaultVect vect() {return _vect;}
164 FaultStat & countStat() {return _count;}
165#if !FULL_SYSTEM
166 void invoke(ThreadContext * tc);
167#endif
168};
169
170class PDtbMissFault : public DtbFault
171{
172 private:
173 static FaultName _name;
174 static FaultVect _vect;
175 static FaultStat _count;
176 public:
| 160 : DtbFault(vaddr, reqFlags, flags)
161 { }
162 FaultName name() const {return _name;}
163 FaultVect vect() {return _vect;}
164 FaultStat & countStat() {return _count;}
165#if !FULL_SYSTEM
166 void invoke(ThreadContext * tc);
167#endif
168};
169
170class PDtbMissFault : public DtbFault
171{
172 private:
173 static FaultName _name;
174 static FaultVect _vect;
175 static FaultStat _count;
176 public:
|
177 PDtbMissFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
| 177 PDtbMissFault(VAddr vaddr, uint32_t reqFlags, uint64_t flags)
|
178 : DtbFault(vaddr, reqFlags, flags)
179 { }
180 FaultName name() const {return _name;}
181 FaultVect vect() {return _vect;}
182 FaultStat & countStat() {return _count;}
183};
184
185class DtbPageFault : public DtbFault
186{
187 private:
188 static FaultName _name;
189 static FaultVect _vect;
190 static FaultStat _count;
191 public:
| 178 : DtbFault(vaddr, reqFlags, flags)
179 { }
180 FaultName name() const {return _name;}
181 FaultVect vect() {return _vect;}
182 FaultStat & countStat() {return _count;}
183};
184
185class DtbPageFault : public DtbFault
186{
187 private:
188 static FaultName _name;
189 static FaultVect _vect;
190 static FaultStat _count;
191 public:
|
192 DtbPageFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
| 192 DtbPageFault(VAddr vaddr, uint32_t reqFlags, uint64_t flags)
|
193 : DtbFault(vaddr, reqFlags, flags)
194 { }
195 FaultName name() const {return _name;}
196 FaultVect vect() {return _vect;}
197 FaultStat & countStat() {return _count;}
198};
199
200class DtbAcvFault : public DtbFault
201{
202 private:
203 static FaultName _name;
204 static FaultVect _vect;
205 static FaultStat _count;
206 public:
| 193 : DtbFault(vaddr, reqFlags, flags)
194 { }
195 FaultName name() const {return _name;}
196 FaultVect vect() {return _vect;}
197 FaultStat & countStat() {return _count;}
198};
199
200class DtbAcvFault : public DtbFault
201{
202 private:
203 static FaultName _name;
204 static FaultVect _vect;
205 static FaultStat _count;
206 public:
|
207 DtbAcvFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
| 207 DtbAcvFault(VAddr vaddr, uint32_t reqFlags, uint64_t flags)
|
208 : DtbFault(vaddr, reqFlags, flags)
209 { }
210 FaultName name() const {return _name;}
211 FaultVect vect() {return _vect;}
212 FaultStat & countStat() {return _count;}
213};
214
215class DtbAlignmentFault : public DtbFault
216{
217 private:
218 static FaultName _name;
219 static FaultVect _vect;
220 static FaultStat _count;
221 public:
| 208 : DtbFault(vaddr, reqFlags, flags)
209 { }
210 FaultName name() const {return _name;}
211 FaultVect vect() {return _vect;}
212 FaultStat & countStat() {return _count;}
213};
214
215class DtbAlignmentFault : public DtbFault
216{
217 private:
218 static FaultName _name;
219 static FaultVect _vect;
220 static FaultStat _count;
221 public:
|
222 DtbAlignmentFault(AlphaISA::VAddr vaddr, uint32_t reqFlags, uint64_t flags)
| 222 DtbAlignmentFault(VAddr vaddr, uint32_t reqFlags, uint64_t flags)
|
223 : DtbFault(vaddr, reqFlags, flags)
224 { }
225 FaultName name() const {return _name;}
226 FaultVect vect() {return _vect;}
227 FaultStat & countStat() {return _count;}
228};
229
230class ItbFault : public AlphaFault
231{
232 protected:
233 Addr pc;
234 public:
235 ItbFault(Addr _pc)
236 : pc(_pc)
237 { }
238 FaultName name() const = 0;
239 FaultVect vect() = 0;
240 FaultStat & countStat() = 0;
241#if FULL_SYSTEM
242 void invoke(ThreadContext * tc);
243#endif
244};
245
246class ItbPageFault : public ItbFault
247{
248 private:
249 static FaultName _name;
250 static FaultVect _vect;
251 static FaultStat _count;
252 public:
253 ItbPageFault(Addr pc)
254 : ItbFault(pc)
255 { }
256 FaultName name() const {return _name;}
257 FaultVect vect() {return _vect;}
258 FaultStat & countStat() {return _count;}
259#if !FULL_SYSTEM
260 void invoke(ThreadContext * tc);
261#endif
262};
263
264class ItbAcvFault : public ItbFault
265{
266 private:
267 static FaultName _name;
268 static FaultVect _vect;
269 static FaultStat _count;
270 public:
271 ItbAcvFault(Addr pc)
272 : ItbFault(pc)
273 { }
274 FaultName name() const {return _name;}
275 FaultVect vect() {return _vect;}
276 FaultStat & countStat() {return _count;}
277};
278
279class UnimplementedOpcodeFault : public AlphaFault
280{
281 private:
282 static FaultName _name;
283 static FaultVect _vect;
284 static FaultStat _count;
285 public:
286 FaultName name() const {return _name;}
287 FaultVect vect() {return _vect;}
288 FaultStat & countStat() {return _count;}
289};
290
291class FloatEnableFault : public AlphaFault
292{
293 private:
294 static FaultName _name;
295 static FaultVect _vect;
296 static FaultStat _count;
297 public:
298 FaultName name() const {return _name;}
299 FaultVect vect() {return _vect;}
300 FaultStat & countStat() {return _count;}
301};
302
303class PalFault : public AlphaFault
304{
305 protected:
306 bool skipFaultingInstruction() {return true;}
307 private:
308 static FaultName _name;
309 static FaultVect _vect;
310 static FaultStat _count;
311 public:
312 FaultName name() const {return _name;}
313 FaultVect vect() {return _vect;}
314 FaultStat & countStat() {return _count;}
315};
316
317class IntegerOverflowFault : public AlphaFault
318{
319 private:
320 static FaultName _name;
321 static FaultVect _vect;
322 static FaultStat _count;
323 public:
324 FaultName name() const {return _name;}
325 FaultVect vect() {return _vect;}
326 FaultStat & countStat() {return _count;}
327};
328
329} // AlphaISA namespace
330
331#endif // __FAULTS_HH__
| 223 : DtbFault(vaddr, reqFlags, flags)
224 { }
225 FaultName name() const {return _name;}
226 FaultVect vect() {return _vect;}
227 FaultStat & countStat() {return _count;}
228};
229
230class ItbFault : public AlphaFault
231{
232 protected:
233 Addr pc;
234 public:
235 ItbFault(Addr _pc)
236 : pc(_pc)
237 { }
238 FaultName name() const = 0;
239 FaultVect vect() = 0;
240 FaultStat & countStat() = 0;
241#if FULL_SYSTEM
242 void invoke(ThreadContext * tc);
243#endif
244};
245
246class ItbPageFault : public ItbFault
247{
248 private:
249 static FaultName _name;
250 static FaultVect _vect;
251 static FaultStat _count;
252 public:
253 ItbPageFault(Addr pc)
254 : ItbFault(pc)
255 { }
256 FaultName name() const {return _name;}
257 FaultVect vect() {return _vect;}
258 FaultStat & countStat() {return _count;}
259#if !FULL_SYSTEM
260 void invoke(ThreadContext * tc);
261#endif
262};
263
264class ItbAcvFault : public ItbFault
265{
266 private:
267 static FaultName _name;
268 static FaultVect _vect;
269 static FaultStat _count;
270 public:
271 ItbAcvFault(Addr pc)
272 : ItbFault(pc)
273 { }
274 FaultName name() const {return _name;}
275 FaultVect vect() {return _vect;}
276 FaultStat & countStat() {return _count;}
277};
278
279class UnimplementedOpcodeFault : public AlphaFault
280{
281 private:
282 static FaultName _name;
283 static FaultVect _vect;
284 static FaultStat _count;
285 public:
286 FaultName name() const {return _name;}
287 FaultVect vect() {return _vect;}
288 FaultStat & countStat() {return _count;}
289};
290
291class FloatEnableFault : public AlphaFault
292{
293 private:
294 static FaultName _name;
295 static FaultVect _vect;
296 static FaultStat _count;
297 public:
298 FaultName name() const {return _name;}
299 FaultVect vect() {return _vect;}
300 FaultStat & countStat() {return _count;}
301};
302
303class PalFault : public AlphaFault
304{
305 protected:
306 bool skipFaultingInstruction() {return true;}
307 private:
308 static FaultName _name;
309 static FaultVect _vect;
310 static FaultStat _count;
311 public:
312 FaultName name() const {return _name;}
313 FaultVect vect() {return _vect;}
314 FaultStat & countStat() {return _count;}
315};
316
317class IntegerOverflowFault : public AlphaFault
318{
319 private:
320 static FaultName _name;
321 static FaultVect _vect;
322 static FaultStat _count;
323 public:
324 FaultName name() const {return _name;}
325 FaultVect vect() {return _vect;}
326 FaultStat & countStat() {return _count;}
327};
328
329} // AlphaISA namespace
330
331#endif // __FAULTS_HH__
|