faults.cc (8405:cdf37bce69fc) | faults.cc (8539:7d3ea3c65c66) |
---|---|
1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 187 unchanged lines hidden (view full) --- 196 197void 198NDtbMissFault::invoke(ThreadContext *tc, StaticInstPtr inst) 199{ 200 Process *p = tc->getProcessPtr(); 201 TlbEntry entry; 202 bool success = p->pTable->lookup(vaddr, entry); 203 if (!success) { | 1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 187 unchanged lines hidden (view full) --- 196 197void 198NDtbMissFault::invoke(ThreadContext *tc, StaticInstPtr inst) 199{ 200 Process *p = tc->getProcessPtr(); 201 TlbEntry entry; 202 bool success = p->pTable->lookup(vaddr, entry); 203 if (!success) { |
204 p->checkAndAllocNextPage(vaddr); 205 success = p->pTable->lookup(vaddr, entry); | 204 if (p->fixupStackFault(vaddr)) 205 success = p->pTable->lookup(vaddr, entry); |
206 } 207 if (!success) { 208 panic("Tried to access unmapped address %#x.\n", (Addr)vaddr); 209 } else { 210 tc->getDTBPtr()->insert(vaddr.page(), entry); 211 } 212} 213 214#endif 215 216} // namespace AlphaISA 217 | 206 } 207 if (!success) { 208 panic("Tried to access unmapped address %#x.\n", (Addr)vaddr); 209 } else { 210 tc->getDTBPtr()->insert(vaddr.page(), entry); 211 } 212} 213 214#endif 215 216} // namespace AlphaISA 217 |