faults.cc (7678:f19b6a3a8cec) | faults.cc (7720:65d338a8dba4) |
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1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 101 unchanged lines hidden (view full) --- 110#if FULL_SYSTEM 111 112void 113AlphaFault::invoke(ThreadContext *tc, StaticInstPtr inst) 114{ 115 FaultBase::invoke(tc); 116 countStat()++; 117 | 1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 101 unchanged lines hidden (view full) --- 110#if FULL_SYSTEM 111 112void 113AlphaFault::invoke(ThreadContext *tc, StaticInstPtr inst) 114{ 115 FaultBase::invoke(tc); 116 countStat()++; 117 |
118 PCState pc = tc->pcState(); 119 |
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118 // exception restart address | 120 // exception restart address |
119 if (setRestartAddress() || !(tc->readPC() & 0x3)) 120 tc->setMiscRegNoEffect(IPR_EXC_ADDR, tc->readPC()); | 121 if (setRestartAddress() || !(pc.pc() & 0x3)) 122 tc->setMiscRegNoEffect(IPR_EXC_ADDR, pc.pc()); |
121 122 if (skipFaultingInstruction()) { 123 // traps... skip faulting instruction. 124 tc->setMiscRegNoEffect(IPR_EXC_ADDR, 125 tc->readMiscRegNoEffect(IPR_EXC_ADDR) + 4); 126 } 127 | 123 124 if (skipFaultingInstruction()) { 125 // traps... skip faulting instruction. 126 tc->setMiscRegNoEffect(IPR_EXC_ADDR, 127 tc->readMiscRegNoEffect(IPR_EXC_ADDR) + 4); 128 } 129 |
128 tc->setPC(tc->readMiscRegNoEffect(IPR_PAL_BASE) + vect()); 129 tc->setNextPC(tc->readPC() + sizeof(MachInst)); | 130 pc.set(tc->readMiscRegNoEffect(IPR_PAL_BASE) + vect()); 131 tc->pcState(pc); |
130} 131 132void 133ArithmeticFault::invoke(ThreadContext *tc, StaticInstPtr inst) 134{ 135 FaultBase::invoke(tc); 136 panic("Arithmetic traps are unimplemented!"); 137} --- 78 unchanged lines hidden --- | 132} 133 134void 135ArithmeticFault::invoke(ThreadContext *tc, StaticInstPtr inst) 136{ 137 FaultBase::invoke(tc); 138 panic("Arithmetic traps are unimplemented!"); 139} --- 78 unchanged lines hidden --- |