faults.cc (5184:8782de2949e5) | faults.cc (5566:3440c9ad49b4) |
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1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 134 unchanged lines hidden (view full) --- 143 // work with EV5 PAL code, but not the other way around. 144 if (!tc->misspeculating() 145 && !(reqFlags & VPTE) && !(reqFlags & NO_FAULT)) { 146 // set VA register with faulting address 147 tc->setMiscRegNoEffect(AlphaISA::IPR_VA, vaddr); 148 149 // set MM_STAT register flags 150 tc->setMiscRegNoEffect(AlphaISA::IPR_MM_STAT, | 1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 134 unchanged lines hidden (view full) --- 143 // work with EV5 PAL code, but not the other way around. 144 if (!tc->misspeculating() 145 && !(reqFlags & VPTE) && !(reqFlags & NO_FAULT)) { 146 // set VA register with faulting address 147 tc->setMiscRegNoEffect(AlphaISA::IPR_VA, vaddr); 148 149 // set MM_STAT register flags 150 tc->setMiscRegNoEffect(AlphaISA::IPR_MM_STAT, |
151 (((EV5::Opcode(tc->getInst()) & 0x3f) << 11) 152 | ((EV5::Ra(tc->getInst()) & 0x1f) << 6) | 151 (((AlphaISA::Opcode(tc->getInst()) & 0x3f) << 11) 152 | ((AlphaISA::Ra(tc->getInst()) & 0x1f) << 6) |
153 | (flags & 0x3f))); 154 155 // set VA_FORM register with faulting formatted address 156 tc->setMiscRegNoEffect(AlphaISA::IPR_VA_FORM, 157 tc->readMiscRegNoEffect(AlphaISA::IPR_MVPTBR) | (vaddr.vpn() << 3)); 158 } 159 160 AlphaFault::invoke(tc); --- 49 unchanged lines hidden --- | 153 | (flags & 0x3f))); 154 155 // set VA_FORM register with faulting formatted address 156 tc->setMiscRegNoEffect(AlphaISA::IPR_VA_FORM, 157 tc->readMiscRegNoEffect(AlphaISA::IPR_MVPTBR) | (vaddr.vpn() << 3)); 158 } 159 160 AlphaFault::invoke(tc); --- 49 unchanged lines hidden --- |