1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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30 */
31
32#include "arch/alpha/faults.hh"
33#include "cpu/thread_context.hh"
34#include "cpu/base.hh"
35#include "base/trace.hh"
36#if FULL_SYSTEM
37#include "arch/alpha/ev5.hh"
38#endif
39
40namespace AlphaISA
41{
42
43FaultName MachineCheckFault::_name = "mchk";
44FaultVect MachineCheckFault::_vect = 0x0401;
45FaultStat MachineCheckFault::_count;

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51FaultName ResetFault::_name = "reset";
52FaultVect ResetFault::_vect = 0x0001;
53FaultStat ResetFault::_count;
54
55FaultName ArithmeticFault::_name = "arith";
56FaultVect ArithmeticFault::_vect = 0x0501;
57FaultStat ArithmeticFault::_count;
58
59FaultName InterruptFault::_name = "interrupt";
60FaultVect InterruptFault::_vect = 0x0101;
61FaultStat InterruptFault::_count;
62
63FaultName NDtbMissFault::_name = "dtb_miss_single";
64FaultVect NDtbMissFault::_vect = 0x0201;
65FaultStat NDtbMissFault::_count;
66

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168 tc->setMiscReg(AlphaISA::IPR_IFAULT_VA_FORM,
169 tc->readMiscReg(AlphaISA::IPR_IVPTBR) |
170 (AlphaISA::VAddr(pc).vpn() << 3));
171 }
172
173 AlphaFault::invoke(tc);
174}
175
176#endif
177
178} // namespace AlphaISA
179