ev5.cc (7720:65d338a8dba4) ev5.cc (8231:51cf7f3cf9ac)
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 275 unchanged lines hidden (view full) ---

284 case IPR_ASTER:
285 // only write least significant four bits - privilege mask
286 ipr[idx] = val & 0xf;
287 break;
288
289 case IPR_IPLR:
290#ifdef DEBUG
291 if (break_ipl != -1 && break_ipl == (int)(val & 0x1f))
1/*
2 * Copyright (c) 2002-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 275 unchanged lines hidden (view full) ---

284 case IPR_ASTER:
285 // only write least significant four bits - privilege mask
286 ipr[idx] = val & 0xf;
287 break;
288
289 case IPR_IPLR:
290#ifdef DEBUG
291 if (break_ipl != -1 && break_ipl == (int)(val & 0x1f))
292 debug_break();
292 Debug::breakpoint();
293#endif
294
295 // only write least significant five bits - interrupt level
296 ipr[idx] = val & 0x1f;
297#if FULL_SYSTEM
298 if (tc->getKernelStats())
299 tc->getKernelStats()->swpipl(ipr[idx]);
300#endif

--- 241 unchanged lines hidden --- 		293#endif
294
295 // only write least significant five bits - interrupt level
296 ipr[idx] = val & 0x1f;
297#if FULL_SYSTEM
298 if (tc->getKernelStats())
299 tc->getKernelStats()->swpipl(ipr[idx]);
300#endif

--- 241 unchanged lines hidden ---