1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 133 unchanged lines hidden (view full) --- 142 // cpu model. Consider changing later.) 143 cpu->thread->setIntReg(ZeroReg, 0); 144 cpu->thread->setFloatReg(ZeroReg, 0.0); 145} 146 147Fault 148SimpleThread::hwrei() 149{ |
150 if (!(readPC() & 0x3)) |
151 return new UnimplementedOpcodeFault; 152 153 setNextPC(readMiscReg(AlphaISA::IPR_EXC_ADDR)); 154 155 if (!misspeculating()) { 156 if (kernelStats) 157 kernelStats->hwrei(); 158 --- 435 unchanged lines hidden --- |