65c65
< tc->setPC(tc->readMiscReg(MISCREG_IPR_PAL_BASE) + reset->vect());
---
> tc->setPC(tc->readMiscReg(IPR_PAL_BASE) + reset->vect());
82,84c82,84
< tc->setMiscReg(MISCREG_IPR_PAL_BASE, PalBase);
< tc->setMiscReg(MISCREG_IPR_MCSR, 0x6);
< tc->setMiscReg(MISCREG_IPR_PALtemp16, cpuId);
---
> tc->setMiscReg(IPR_PAL_BASE, PalBase);
> tc->setMiscReg(IPR_MCSR, 0x6);
> tc->setMiscReg(IPR_PALtemp16, cpuId);
99c99
< if (cpu->readMiscReg(MISCREG_IPR_ASTRR))
---
> if (cpu->readMiscReg(IPR_ASTRR))
102c102
< if (cpu->readMiscReg(MISCREG_IPR_SIRR)) {
---
> if (cpu->readMiscReg(IPR_SIRR)) {
105c105
< if (cpu->readMiscReg(MISCREG_IPR_SIRR) & (ULL(1) << i)) {
---
> if (cpu->readMiscReg(IPR_SIRR) & (ULL(1) << i)) {
126,128c126,128
< if (ipl && ipl > cpu->readMiscReg(MISCREG_IPR_IPLR)) {
< cpu->setMiscReg(MISCREG_IPR_ISR, summary);
< cpu->setMiscReg(MISCREG_IPR_INTID, ipl);
---
> if (ipl && ipl > cpu->readMiscReg(IPR_IPLR)) {
> cpu->setMiscReg(IPR_ISR, summary);
> cpu->setMiscReg(IPR_INTID, ipl);
131c131
< cpu->readMiscReg(MISCREG_IPR_IPLR), ipl, summary);
---
> cpu->readMiscReg(IPR_IPLR), ipl, summary);
153c153
< setNextPC(readMiscReg(AlphaISA::MISCREG_IPR_EXC_ADDR));
---
> setNextPC(readMiscReg(AlphaISA::IPR_EXC_ADDR));
169c169
< return EV5::ITB_ASN_ASN(ipr[MISCREG_IPR_ITB_ASN]);
---
> return EV5::ITB_ASN_ASN(ipr[IPR_ITB_ASN]);
175c175
< return EV5::DTB_ASN_ASN(ipr[MISCREG_IPR_DTB_ASN]);
---
> return EV5::DTB_ASN_ASN(ipr[IPR_DTB_ASN]);
184,208c184,208
< case AlphaISA::MISCREG_IPR_PALtemp0:
< case AlphaISA::MISCREG_IPR_PALtemp1:
< case AlphaISA::MISCREG_IPR_PALtemp2:
< case AlphaISA::MISCREG_IPR_PALtemp3:
< case AlphaISA::MISCREG_IPR_PALtemp4:
< case AlphaISA::MISCREG_IPR_PALtemp5:
< case AlphaISA::MISCREG_IPR_PALtemp6:
< case AlphaISA::MISCREG_IPR_PALtemp7:
< case AlphaISA::MISCREG_IPR_PALtemp8:
< case AlphaISA::MISCREG_IPR_PALtemp9:
< case AlphaISA::MISCREG_IPR_PALtemp10:
< case AlphaISA::MISCREG_IPR_PALtemp11:
< case AlphaISA::MISCREG_IPR_PALtemp12:
< case AlphaISA::MISCREG_IPR_PALtemp13:
< case AlphaISA::MISCREG_IPR_PALtemp14:
< case AlphaISA::MISCREG_IPR_PALtemp15:
< case AlphaISA::MISCREG_IPR_PALtemp16:
< case AlphaISA::MISCREG_IPR_PALtemp17:
< case AlphaISA::MISCREG_IPR_PALtemp18:
< case AlphaISA::MISCREG_IPR_PALtemp19:
< case AlphaISA::MISCREG_IPR_PALtemp20:
< case AlphaISA::MISCREG_IPR_PALtemp21:
< case AlphaISA::MISCREG_IPR_PALtemp22:
< case AlphaISA::MISCREG_IPR_PALtemp23:
< case AlphaISA::MISCREG_IPR_PAL_BASE:
---
> case AlphaISA::IPR_PALtemp0:
> case AlphaISA::IPR_PALtemp1:
> case AlphaISA::IPR_PALtemp2:
> case AlphaISA::IPR_PALtemp3:
> case AlphaISA::IPR_PALtemp4:
> case AlphaISA::IPR_PALtemp5:
> case AlphaISA::IPR_PALtemp6:
> case AlphaISA::IPR_PALtemp7:
> case AlphaISA::IPR_PALtemp8:
> case AlphaISA::IPR_PALtemp9:
> case AlphaISA::IPR_PALtemp10:
> case AlphaISA::IPR_PALtemp11:
> case AlphaISA::IPR_PALtemp12:
> case AlphaISA::IPR_PALtemp13:
> case AlphaISA::IPR_PALtemp14:
> case AlphaISA::IPR_PALtemp15:
> case AlphaISA::IPR_PALtemp16:
> case AlphaISA::IPR_PALtemp17:
> case AlphaISA::IPR_PALtemp18:
> case AlphaISA::IPR_PALtemp19:
> case AlphaISA::IPR_PALtemp20:
> case AlphaISA::IPR_PALtemp21:
> case AlphaISA::IPR_PALtemp22:
> case AlphaISA::IPR_PALtemp23:
> case AlphaISA::IPR_PAL_BASE:
210,226c210,226
< case AlphaISA::MISCREG_IPR_IVPTBR:
< case AlphaISA::MISCREG_IPR_DC_MODE:
< case AlphaISA::MISCREG_IPR_MAF_MODE:
< case AlphaISA::MISCREG_IPR_ISR:
< case AlphaISA::MISCREG_IPR_EXC_ADDR:
< case AlphaISA::MISCREG_IPR_IC_PERR_STAT:
< case AlphaISA::MISCREG_IPR_DC_PERR_STAT:
< case AlphaISA::MISCREG_IPR_MCSR:
< case AlphaISA::MISCREG_IPR_ASTRR:
< case AlphaISA::MISCREG_IPR_ASTER:
< case AlphaISA::MISCREG_IPR_SIRR:
< case AlphaISA::MISCREG_IPR_ICSR:
< case AlphaISA::MISCREG_IPR_ICM:
< case AlphaISA::MISCREG_IPR_DTB_CM:
< case AlphaISA::MISCREG_IPR_IPLR:
< case AlphaISA::MISCREG_IPR_INTID:
< case AlphaISA::MISCREG_IPR_PMCTR:
---
> case AlphaISA::IPR_IVPTBR:
> case AlphaISA::IPR_DC_MODE:
> case AlphaISA::IPR_MAF_MODE:
> case AlphaISA::IPR_ISR:
> case AlphaISA::IPR_EXC_ADDR:
> case AlphaISA::IPR_IC_PERR_STAT:
> case AlphaISA::IPR_DC_PERR_STAT:
> case AlphaISA::IPR_MCSR:
> case AlphaISA::IPR_ASTRR:
> case AlphaISA::IPR_ASTER:
> case AlphaISA::IPR_SIRR:
> case AlphaISA::IPR_ICSR:
> case AlphaISA::IPR_ICM:
> case AlphaISA::IPR_DTB_CM:
> case AlphaISA::IPR_IPLR:
> case AlphaISA::IPR_INTID:
> case AlphaISA::IPR_PMCTR:
231c231
< case AlphaISA::MISCREG_IPR_CC:
---
> case AlphaISA::IPR_CC:
236c236
< case AlphaISA::MISCREG_IPR_VA:
---
> case AlphaISA::IPR_VA:
240,244c240,244
< case AlphaISA::MISCREG_IPR_VA_FORM:
< case AlphaISA::MISCREG_IPR_MM_STAT:
< case AlphaISA::MISCREG_IPR_IFAULT_VA_FORM:
< case AlphaISA::MISCREG_IPR_EXC_MASK:
< case AlphaISA::MISCREG_IPR_EXC_SUM:
---
> case AlphaISA::IPR_VA_FORM:
> case AlphaISA::IPR_MM_STAT:
> case AlphaISA::IPR_IFAULT_VA_FORM:
> case AlphaISA::IPR_EXC_MASK:
> case AlphaISA::IPR_EXC_SUM:
248c248
< case AlphaISA::MISCREG_IPR_DTB_PTE:
---
> case AlphaISA::IPR_DTB_PTE:
263,271c263,271
< case AlphaISA::MISCREG_IPR_HWINT_CLR:
< case AlphaISA::MISCREG_IPR_SL_XMIT:
< case AlphaISA::MISCREG_IPR_DC_FLUSH:
< case AlphaISA::MISCREG_IPR_IC_FLUSH:
< case AlphaISA::MISCREG_IPR_ALT_MODE:
< case AlphaISA::MISCREG_IPR_DTB_IA:
< case AlphaISA::MISCREG_IPR_DTB_IAP:
< case AlphaISA::MISCREG_IPR_ITB_IA:
< case AlphaISA::MISCREG_IPR_ITB_IAP:
---
> case AlphaISA::IPR_HWINT_CLR:
> case AlphaISA::IPR_SL_XMIT:
> case AlphaISA::IPR_DC_FLUSH:
> case AlphaISA::IPR_IC_FLUSH:
> case AlphaISA::IPR_ALT_MODE:
> case AlphaISA::IPR_DTB_IA:
> case AlphaISA::IPR_DTB_IAP:
> case AlphaISA::IPR_ITB_IA:
> case AlphaISA::IPR_ITB_IAP:
298,324c298,324
< case AlphaISA::MISCREG_IPR_PALtemp0:
< case AlphaISA::MISCREG_IPR_PALtemp1:
< case AlphaISA::MISCREG_IPR_PALtemp2:
< case AlphaISA::MISCREG_IPR_PALtemp3:
< case AlphaISA::MISCREG_IPR_PALtemp4:
< case AlphaISA::MISCREG_IPR_PALtemp5:
< case AlphaISA::MISCREG_IPR_PALtemp6:
< case AlphaISA::MISCREG_IPR_PALtemp7:
< case AlphaISA::MISCREG_IPR_PALtemp8:
< case AlphaISA::MISCREG_IPR_PALtemp9:
< case AlphaISA::MISCREG_IPR_PALtemp10:
< case AlphaISA::MISCREG_IPR_PALtemp11:
< case AlphaISA::MISCREG_IPR_PALtemp12:
< case AlphaISA::MISCREG_IPR_PALtemp13:
< case AlphaISA::MISCREG_IPR_PALtemp14:
< case AlphaISA::MISCREG_IPR_PALtemp15:
< case AlphaISA::MISCREG_IPR_PALtemp16:
< case AlphaISA::MISCREG_IPR_PALtemp17:
< case AlphaISA::MISCREG_IPR_PALtemp18:
< case AlphaISA::MISCREG_IPR_PALtemp19:
< case AlphaISA::MISCREG_IPR_PALtemp20:
< case AlphaISA::MISCREG_IPR_PALtemp21:
< case AlphaISA::MISCREG_IPR_PALtemp22:
< case AlphaISA::MISCREG_IPR_PAL_BASE:
< case AlphaISA::MISCREG_IPR_IC_PERR_STAT:
< case AlphaISA::MISCREG_IPR_DC_PERR_STAT:
< case AlphaISA::MISCREG_IPR_PMCTR:
---
> case AlphaISA::IPR_PALtemp0:
> case AlphaISA::IPR_PALtemp1:
> case AlphaISA::IPR_PALtemp2:
> case AlphaISA::IPR_PALtemp3:
> case AlphaISA::IPR_PALtemp4:
> case AlphaISA::IPR_PALtemp5:
> case AlphaISA::IPR_PALtemp6:
> case AlphaISA::IPR_PALtemp7:
> case AlphaISA::IPR_PALtemp8:
> case AlphaISA::IPR_PALtemp9:
> case AlphaISA::IPR_PALtemp10:
> case AlphaISA::IPR_PALtemp11:
> case AlphaISA::IPR_PALtemp12:
> case AlphaISA::IPR_PALtemp13:
> case AlphaISA::IPR_PALtemp14:
> case AlphaISA::IPR_PALtemp15:
> case AlphaISA::IPR_PALtemp16:
> case AlphaISA::IPR_PALtemp17:
> case AlphaISA::IPR_PALtemp18:
> case AlphaISA::IPR_PALtemp19:
> case AlphaISA::IPR_PALtemp20:
> case AlphaISA::IPR_PALtemp21:
> case AlphaISA::IPR_PALtemp22:
> case AlphaISA::IPR_PAL_BASE:
> case AlphaISA::IPR_IC_PERR_STAT:
> case AlphaISA::IPR_DC_PERR_STAT:
> case AlphaISA::IPR_PMCTR:
329c329
< case AlphaISA::MISCREG_IPR_CC_CTL:
---
> case AlphaISA::IPR_CC_CTL:
336c336
< case AlphaISA::MISCREG_IPR_CC:
---
> case AlphaISA::IPR_CC:
343c343
< case AlphaISA::MISCREG_IPR_PALtemp23:
---
> case AlphaISA::IPR_PALtemp23:
351c351
< case AlphaISA::MISCREG_IPR_DTB_PTE:
---
> case AlphaISA::IPR_DTB_PTE:
356c356
< case AlphaISA::MISCREG_IPR_EXC_ADDR:
---
> case AlphaISA::IPR_EXC_ADDR:
361,362c361,362
< case AlphaISA::MISCREG_IPR_ASTRR:
< case AlphaISA::MISCREG_IPR_ASTER:
---
> case AlphaISA::IPR_ASTRR:
> case AlphaISA::IPR_ASTER:
367c367
< case AlphaISA::MISCREG_IPR_IPLR:
---
> case AlphaISA::IPR_IPLR:
379c379
< case AlphaISA::MISCREG_IPR_DTB_CM:
---
> case AlphaISA::IPR_DTB_CM:
388c388
< case AlphaISA::MISCREG_IPR_ICM:
---
> case AlphaISA::IPR_ICM:
393c393
< case AlphaISA::MISCREG_IPR_ALT_MODE:
---
> case AlphaISA::IPR_ALT_MODE:
398c398
< case AlphaISA::MISCREG_IPR_MCSR:
---
> case AlphaISA::IPR_MCSR:
403c403
< case AlphaISA::MISCREG_IPR_SIRR:
---
> case AlphaISA::IPR_SIRR:
408c408
< case AlphaISA::MISCREG_IPR_ICSR:
---
> case AlphaISA::IPR_ICSR:
412,413c412,413
< case AlphaISA::MISCREG_IPR_IVPTBR:
< case AlphaISA::MISCREG_IPR_MVPTBR:
---
> case AlphaISA::IPR_IVPTBR:
> case AlphaISA::IPR_MVPTBR:
417c417
< case AlphaISA::MISCREG_IPR_DC_TEST_CTL:
---
> case AlphaISA::IPR_DC_TEST_CTL:
421,422c421,422
< case AlphaISA::MISCREG_IPR_DC_MODE:
< case AlphaISA::MISCREG_IPR_MAF_MODE:
---
> case AlphaISA::IPR_DC_MODE:
> case AlphaISA::IPR_MAF_MODE:
426c426
< case AlphaISA::MISCREG_IPR_ITB_ASN:
---
> case AlphaISA::IPR_ITB_ASN:
430c430
< case AlphaISA::MISCREG_IPR_DTB_ASN:
---
> case AlphaISA::IPR_DTB_ASN:
434,435c434,435
< case AlphaISA::MISCREG_IPR_EXC_SUM:
< case AlphaISA::MISCREG_IPR_EXC_MASK:
---
> case AlphaISA::IPR_EXC_SUM:
> case AlphaISA::IPR_EXC_MASK:
440,444c440,444
< case AlphaISA::MISCREG_IPR_INTID:
< case AlphaISA::MISCREG_IPR_SL_RCV:
< case AlphaISA::MISCREG_IPR_MM_STAT:
< case AlphaISA::MISCREG_IPR_ITB_PTE_TEMP:
< case AlphaISA::MISCREG_IPR_DTB_PTE_TEMP:
---
> case AlphaISA::IPR_INTID:
> case AlphaISA::IPR_SL_RCV:
> case AlphaISA::IPR_MM_STAT:
> case AlphaISA::IPR_ITB_PTE_TEMP:
> case AlphaISA::IPR_DTB_PTE_TEMP:
448,451c448,451
< case AlphaISA::MISCREG_IPR_HWINT_CLR:
< case AlphaISA::MISCREG_IPR_SL_XMIT:
< case AlphaISA::MISCREG_IPR_DC_FLUSH:
< case AlphaISA::MISCREG_IPR_IC_FLUSH:
---
> case AlphaISA::IPR_HWINT_CLR:
> case AlphaISA::IPR_SL_XMIT:
> case AlphaISA::IPR_DC_FLUSH:
> case AlphaISA::IPR_IC_FLUSH:
456c456
< case AlphaISA::MISCREG_IPR_DTB_IA:
---
> case AlphaISA::IPR_DTB_IA:
463c463
< case AlphaISA::MISCREG_IPR_DTB_IAP:
---
> case AlphaISA::IPR_DTB_IAP:
470c470
< case AlphaISA::MISCREG_IPR_DTB_IS:
---
> case AlphaISA::IPR_DTB_IS:
475c475
< DTB_ASN_ASN(ipr[AlphaISA::MISCREG_IPR_DTB_ASN]));
---
> DTB_ASN_ASN(ipr[AlphaISA::IPR_DTB_ASN]));
478c478
< case AlphaISA::MISCREG_IPR_DTB_TAG: {
---
> case AlphaISA::IPR_DTB_TAG: {
482c482
< if (DTB_PTE_GH(ipr[AlphaISA::MISCREG_IPR_DTB_PTE]) != 0)
---
> if (DTB_PTE_GH(ipr[AlphaISA::IPR_DTB_PTE]) != 0)
489,495c489,495
< pte.ppn = DTB_PTE_PPN(ipr[AlphaISA::MISCREG_IPR_DTB_PTE]);
< pte.xre = DTB_PTE_XRE(ipr[AlphaISA::MISCREG_IPR_DTB_PTE]);
< pte.xwe = DTB_PTE_XWE(ipr[AlphaISA::MISCREG_IPR_DTB_PTE]);
< pte.fonr = DTB_PTE_FONR(ipr[AlphaISA::MISCREG_IPR_DTB_PTE]);
< pte.fonw = DTB_PTE_FONW(ipr[AlphaISA::MISCREG_IPR_DTB_PTE]);
< pte.asma = DTB_PTE_ASMA(ipr[AlphaISA::MISCREG_IPR_DTB_PTE]);
< pte.asn = DTB_ASN_ASN(ipr[AlphaISA::MISCREG_IPR_DTB_ASN]);
---
> pte.ppn = DTB_PTE_PPN(ipr[AlphaISA::IPR_DTB_PTE]);
> pte.xre = DTB_PTE_XRE(ipr[AlphaISA::IPR_DTB_PTE]);
> pte.xwe = DTB_PTE_XWE(ipr[AlphaISA::IPR_DTB_PTE]);
> pte.fonr = DTB_PTE_FONR(ipr[AlphaISA::IPR_DTB_PTE]);
> pte.fonw = DTB_PTE_FONW(ipr[AlphaISA::IPR_DTB_PTE]);
> pte.asma = DTB_PTE_ASMA(ipr[AlphaISA::IPR_DTB_PTE]);
> pte.asn = DTB_ASN_ASN(ipr[AlphaISA::IPR_DTB_ASN]);
502c502
< case AlphaISA::MISCREG_IPR_ITB_PTE: {
---
> case AlphaISA::IPR_ITB_PTE: {
519c519
< pte.asn = ITB_ASN_ASN(ipr[AlphaISA::MISCREG_IPR_ITB_ASN]);
---
> pte.asn = ITB_ASN_ASN(ipr[AlphaISA::IPR_ITB_ASN]);
522c522
< tc->getITBPtr()->insert(ipr[AlphaISA::MISCREG_IPR_ITB_TAG], pte);
---
> tc->getITBPtr()->insert(ipr[AlphaISA::IPR_ITB_TAG], pte);
526c526
< case AlphaISA::MISCREG_IPR_ITB_IA:
---
> case AlphaISA::IPR_ITB_IA:
533c533
< case AlphaISA::MISCREG_IPR_ITB_IAP:
---
> case AlphaISA::IPR_ITB_IAP:
540c540
< case AlphaISA::MISCREG_IPR_ITB_IS:
---
> case AlphaISA::IPR_ITB_IS:
545c545
< ITB_ASN_ASN(ipr[AlphaISA::MISCREG_IPR_ITB_ASN]));
---
> ITB_ASN_ASN(ipr[AlphaISA::IPR_ITB_ASN]));
< tc->setPC(tc->readMiscReg(MISCREG_IPR_PAL_BASE) + reset->vect());
---
> tc->setPC(tc->readMiscReg(IPR_PAL_BASE) + reset->vect());
82,84c82,84
< tc->setMiscReg(MISCREG_IPR_PAL_BASE, PalBase);
< tc->setMiscReg(MISCREG_IPR_MCSR, 0x6);
< tc->setMiscReg(MISCREG_IPR_PALtemp16, cpuId);
---
> tc->setMiscReg(IPR_PAL_BASE, PalBase);
> tc->setMiscReg(IPR_MCSR, 0x6);
> tc->setMiscReg(IPR_PALtemp16, cpuId);
99c99
< if (cpu->readMiscReg(MISCREG_IPR_ASTRR))
---
> if (cpu->readMiscReg(IPR_ASTRR))
102c102
< if (cpu->readMiscReg(MISCREG_IPR_SIRR)) {
---
> if (cpu->readMiscReg(IPR_SIRR)) {
105c105
< if (cpu->readMiscReg(MISCREG_IPR_SIRR) & (ULL(1) << i)) {
---
> if (cpu->readMiscReg(IPR_SIRR) & (ULL(1) << i)) {
126,128c126,128
< if (ipl && ipl > cpu->readMiscReg(MISCREG_IPR_IPLR)) {
< cpu->setMiscReg(MISCREG_IPR_ISR, summary);
< cpu->setMiscReg(MISCREG_IPR_INTID, ipl);
---
> if (ipl && ipl > cpu->readMiscReg(IPR_IPLR)) {
> cpu->setMiscReg(IPR_ISR, summary);
> cpu->setMiscReg(IPR_INTID, ipl);
131c131
< cpu->readMiscReg(MISCREG_IPR_IPLR), ipl, summary);
---
> cpu->readMiscReg(IPR_IPLR), ipl, summary);
153c153
< setNextPC(readMiscReg(AlphaISA::MISCREG_IPR_EXC_ADDR));
---
> setNextPC(readMiscReg(AlphaISA::IPR_EXC_ADDR));
169c169
< return EV5::ITB_ASN_ASN(ipr[MISCREG_IPR_ITB_ASN]);
---
> return EV5::ITB_ASN_ASN(ipr[IPR_ITB_ASN]);
175c175
< return EV5::DTB_ASN_ASN(ipr[MISCREG_IPR_DTB_ASN]);
---
> return EV5::DTB_ASN_ASN(ipr[IPR_DTB_ASN]);
184,208c184,208
< case AlphaISA::MISCREG_IPR_PALtemp0:
< case AlphaISA::MISCREG_IPR_PALtemp1:
< case AlphaISA::MISCREG_IPR_PALtemp2:
< case AlphaISA::MISCREG_IPR_PALtemp3:
< case AlphaISA::MISCREG_IPR_PALtemp4:
< case AlphaISA::MISCREG_IPR_PALtemp5:
< case AlphaISA::MISCREG_IPR_PALtemp6:
< case AlphaISA::MISCREG_IPR_PALtemp7:
< case AlphaISA::MISCREG_IPR_PALtemp8:
< case AlphaISA::MISCREG_IPR_PALtemp9:
< case AlphaISA::MISCREG_IPR_PALtemp10:
< case AlphaISA::MISCREG_IPR_PALtemp11:
< case AlphaISA::MISCREG_IPR_PALtemp12:
< case AlphaISA::MISCREG_IPR_PALtemp13:
< case AlphaISA::MISCREG_IPR_PALtemp14:
< case AlphaISA::MISCREG_IPR_PALtemp15:
< case AlphaISA::MISCREG_IPR_PALtemp16:
< case AlphaISA::MISCREG_IPR_PALtemp17:
< case AlphaISA::MISCREG_IPR_PALtemp18:
< case AlphaISA::MISCREG_IPR_PALtemp19:
< case AlphaISA::MISCREG_IPR_PALtemp20:
< case AlphaISA::MISCREG_IPR_PALtemp21:
< case AlphaISA::MISCREG_IPR_PALtemp22:
< case AlphaISA::MISCREG_IPR_PALtemp23:
< case AlphaISA::MISCREG_IPR_PAL_BASE:
---
> case AlphaISA::IPR_PALtemp0:
> case AlphaISA::IPR_PALtemp1:
> case AlphaISA::IPR_PALtemp2:
> case AlphaISA::IPR_PALtemp3:
> case AlphaISA::IPR_PALtemp4:
> case AlphaISA::IPR_PALtemp5:
> case AlphaISA::IPR_PALtemp6:
> case AlphaISA::IPR_PALtemp7:
> case AlphaISA::IPR_PALtemp8:
> case AlphaISA::IPR_PALtemp9:
> case AlphaISA::IPR_PALtemp10:
> case AlphaISA::IPR_PALtemp11:
> case AlphaISA::IPR_PALtemp12:
> case AlphaISA::IPR_PALtemp13:
> case AlphaISA::IPR_PALtemp14:
> case AlphaISA::IPR_PALtemp15:
> case AlphaISA::IPR_PALtemp16:
> case AlphaISA::IPR_PALtemp17:
> case AlphaISA::IPR_PALtemp18:
> case AlphaISA::IPR_PALtemp19:
> case AlphaISA::IPR_PALtemp20:
> case AlphaISA::IPR_PALtemp21:
> case AlphaISA::IPR_PALtemp22:
> case AlphaISA::IPR_PALtemp23:
> case AlphaISA::IPR_PAL_BASE:
210,226c210,226
< case AlphaISA::MISCREG_IPR_IVPTBR:
< case AlphaISA::MISCREG_IPR_DC_MODE:
< case AlphaISA::MISCREG_IPR_MAF_MODE:
< case AlphaISA::MISCREG_IPR_ISR:
< case AlphaISA::MISCREG_IPR_EXC_ADDR:
< case AlphaISA::MISCREG_IPR_IC_PERR_STAT:
< case AlphaISA::MISCREG_IPR_DC_PERR_STAT:
< case AlphaISA::MISCREG_IPR_MCSR:
< case AlphaISA::MISCREG_IPR_ASTRR:
< case AlphaISA::MISCREG_IPR_ASTER:
< case AlphaISA::MISCREG_IPR_SIRR:
< case AlphaISA::MISCREG_IPR_ICSR:
< case AlphaISA::MISCREG_IPR_ICM:
< case AlphaISA::MISCREG_IPR_DTB_CM:
< case AlphaISA::MISCREG_IPR_IPLR:
< case AlphaISA::MISCREG_IPR_INTID:
< case AlphaISA::MISCREG_IPR_PMCTR:
---
> case AlphaISA::IPR_IVPTBR:
> case AlphaISA::IPR_DC_MODE:
> case AlphaISA::IPR_MAF_MODE:
> case AlphaISA::IPR_ISR:
> case AlphaISA::IPR_EXC_ADDR:
> case AlphaISA::IPR_IC_PERR_STAT:
> case AlphaISA::IPR_DC_PERR_STAT:
> case AlphaISA::IPR_MCSR:
> case AlphaISA::IPR_ASTRR:
> case AlphaISA::IPR_ASTER:
> case AlphaISA::IPR_SIRR:
> case AlphaISA::IPR_ICSR:
> case AlphaISA::IPR_ICM:
> case AlphaISA::IPR_DTB_CM:
> case AlphaISA::IPR_IPLR:
> case AlphaISA::IPR_INTID:
> case AlphaISA::IPR_PMCTR:
231c231
< case AlphaISA::MISCREG_IPR_CC:
---
> case AlphaISA::IPR_CC:
236c236
< case AlphaISA::MISCREG_IPR_VA:
---
> case AlphaISA::IPR_VA:
240,244c240,244
< case AlphaISA::MISCREG_IPR_VA_FORM:
< case AlphaISA::MISCREG_IPR_MM_STAT:
< case AlphaISA::MISCREG_IPR_IFAULT_VA_FORM:
< case AlphaISA::MISCREG_IPR_EXC_MASK:
< case AlphaISA::MISCREG_IPR_EXC_SUM:
---
> case AlphaISA::IPR_VA_FORM:
> case AlphaISA::IPR_MM_STAT:
> case AlphaISA::IPR_IFAULT_VA_FORM:
> case AlphaISA::IPR_EXC_MASK:
> case AlphaISA::IPR_EXC_SUM:
248c248
< case AlphaISA::MISCREG_IPR_DTB_PTE:
---
> case AlphaISA::IPR_DTB_PTE:
263,271c263,271
< case AlphaISA::MISCREG_IPR_HWINT_CLR:
< case AlphaISA::MISCREG_IPR_SL_XMIT:
< case AlphaISA::MISCREG_IPR_DC_FLUSH:
< case AlphaISA::MISCREG_IPR_IC_FLUSH:
< case AlphaISA::MISCREG_IPR_ALT_MODE:
< case AlphaISA::MISCREG_IPR_DTB_IA:
< case AlphaISA::MISCREG_IPR_DTB_IAP:
< case AlphaISA::MISCREG_IPR_ITB_IA:
< case AlphaISA::MISCREG_IPR_ITB_IAP:
---
> case AlphaISA::IPR_HWINT_CLR:
> case AlphaISA::IPR_SL_XMIT:
> case AlphaISA::IPR_DC_FLUSH:
> case AlphaISA::IPR_IC_FLUSH:
> case AlphaISA::IPR_ALT_MODE:
> case AlphaISA::IPR_DTB_IA:
> case AlphaISA::IPR_DTB_IAP:
> case AlphaISA::IPR_ITB_IA:
> case AlphaISA::IPR_ITB_IAP:
298,324c298,324
< case AlphaISA::MISCREG_IPR_PALtemp0:
< case AlphaISA::MISCREG_IPR_PALtemp1:
< case AlphaISA::MISCREG_IPR_PALtemp2:
< case AlphaISA::MISCREG_IPR_PALtemp3:
< case AlphaISA::MISCREG_IPR_PALtemp4:
< case AlphaISA::MISCREG_IPR_PALtemp5:
< case AlphaISA::MISCREG_IPR_PALtemp6:
< case AlphaISA::MISCREG_IPR_PALtemp7:
< case AlphaISA::MISCREG_IPR_PALtemp8:
< case AlphaISA::MISCREG_IPR_PALtemp9:
< case AlphaISA::MISCREG_IPR_PALtemp10:
< case AlphaISA::MISCREG_IPR_PALtemp11:
< case AlphaISA::MISCREG_IPR_PALtemp12:
< case AlphaISA::MISCREG_IPR_PALtemp13:
< case AlphaISA::MISCREG_IPR_PALtemp14:
< case AlphaISA::MISCREG_IPR_PALtemp15:
< case AlphaISA::MISCREG_IPR_PALtemp16:
< case AlphaISA::MISCREG_IPR_PALtemp17:
< case AlphaISA::MISCREG_IPR_PALtemp18:
< case AlphaISA::MISCREG_IPR_PALtemp19:
< case AlphaISA::MISCREG_IPR_PALtemp20:
< case AlphaISA::MISCREG_IPR_PALtemp21:
< case AlphaISA::MISCREG_IPR_PALtemp22:
< case AlphaISA::MISCREG_IPR_PAL_BASE:
< case AlphaISA::MISCREG_IPR_IC_PERR_STAT:
< case AlphaISA::MISCREG_IPR_DC_PERR_STAT:
< case AlphaISA::MISCREG_IPR_PMCTR:
---
> case AlphaISA::IPR_PALtemp0:
> case AlphaISA::IPR_PALtemp1:
> case AlphaISA::IPR_PALtemp2:
> case AlphaISA::IPR_PALtemp3:
> case AlphaISA::IPR_PALtemp4:
> case AlphaISA::IPR_PALtemp5:
> case AlphaISA::IPR_PALtemp6:
> case AlphaISA::IPR_PALtemp7:
> case AlphaISA::IPR_PALtemp8:
> case AlphaISA::IPR_PALtemp9:
> case AlphaISA::IPR_PALtemp10:
> case AlphaISA::IPR_PALtemp11:
> case AlphaISA::IPR_PALtemp12:
> case AlphaISA::IPR_PALtemp13:
> case AlphaISA::IPR_PALtemp14:
> case AlphaISA::IPR_PALtemp15:
> case AlphaISA::IPR_PALtemp16:
> case AlphaISA::IPR_PALtemp17:
> case AlphaISA::IPR_PALtemp18:
> case AlphaISA::IPR_PALtemp19:
> case AlphaISA::IPR_PALtemp20:
> case AlphaISA::IPR_PALtemp21:
> case AlphaISA::IPR_PALtemp22:
> case AlphaISA::IPR_PAL_BASE:
> case AlphaISA::IPR_IC_PERR_STAT:
> case AlphaISA::IPR_DC_PERR_STAT:
> case AlphaISA::IPR_PMCTR:
329c329
< case AlphaISA::MISCREG_IPR_CC_CTL:
---
> case AlphaISA::IPR_CC_CTL:
336c336
< case AlphaISA::MISCREG_IPR_CC:
---
> case AlphaISA::IPR_CC:
343c343
< case AlphaISA::MISCREG_IPR_PALtemp23:
---
> case AlphaISA::IPR_PALtemp23:
351c351
< case AlphaISA::MISCREG_IPR_DTB_PTE:
---
> case AlphaISA::IPR_DTB_PTE:
356c356
< case AlphaISA::MISCREG_IPR_EXC_ADDR:
---
> case AlphaISA::IPR_EXC_ADDR:
361,362c361,362
< case AlphaISA::MISCREG_IPR_ASTRR:
< case AlphaISA::MISCREG_IPR_ASTER:
---
> case AlphaISA::IPR_ASTRR:
> case AlphaISA::IPR_ASTER:
367c367
< case AlphaISA::MISCREG_IPR_IPLR:
---
> case AlphaISA::IPR_IPLR:
379c379
< case AlphaISA::MISCREG_IPR_DTB_CM:
---
> case AlphaISA::IPR_DTB_CM:
388c388
< case AlphaISA::MISCREG_IPR_ICM:
---
> case AlphaISA::IPR_ICM:
393c393
< case AlphaISA::MISCREG_IPR_ALT_MODE:
---
> case AlphaISA::IPR_ALT_MODE:
398c398
< case AlphaISA::MISCREG_IPR_MCSR:
---
> case AlphaISA::IPR_MCSR:
403c403
< case AlphaISA::MISCREG_IPR_SIRR:
---
> case AlphaISA::IPR_SIRR:
408c408
< case AlphaISA::MISCREG_IPR_ICSR:
---
> case AlphaISA::IPR_ICSR:
412,413c412,413
< case AlphaISA::MISCREG_IPR_IVPTBR:
< case AlphaISA::MISCREG_IPR_MVPTBR:
---
> case AlphaISA::IPR_IVPTBR:
> case AlphaISA::IPR_MVPTBR:
417c417
< case AlphaISA::MISCREG_IPR_DC_TEST_CTL:
---
> case AlphaISA::IPR_DC_TEST_CTL:
421,422c421,422
< case AlphaISA::MISCREG_IPR_DC_MODE:
< case AlphaISA::MISCREG_IPR_MAF_MODE:
---
> case AlphaISA::IPR_DC_MODE:
> case AlphaISA::IPR_MAF_MODE:
426c426
< case AlphaISA::MISCREG_IPR_ITB_ASN:
---
> case AlphaISA::IPR_ITB_ASN:
430c430
< case AlphaISA::MISCREG_IPR_DTB_ASN:
---
> case AlphaISA::IPR_DTB_ASN:
434,435c434,435
< case AlphaISA::MISCREG_IPR_EXC_SUM:
< case AlphaISA::MISCREG_IPR_EXC_MASK:
---
> case AlphaISA::IPR_EXC_SUM:
> case AlphaISA::IPR_EXC_MASK:
440,444c440,444
< case AlphaISA::MISCREG_IPR_INTID:
< case AlphaISA::MISCREG_IPR_SL_RCV:
< case AlphaISA::MISCREG_IPR_MM_STAT:
< case AlphaISA::MISCREG_IPR_ITB_PTE_TEMP:
< case AlphaISA::MISCREG_IPR_DTB_PTE_TEMP:
---
> case AlphaISA::IPR_INTID:
> case AlphaISA::IPR_SL_RCV:
> case AlphaISA::IPR_MM_STAT:
> case AlphaISA::IPR_ITB_PTE_TEMP:
> case AlphaISA::IPR_DTB_PTE_TEMP:
448,451c448,451
< case AlphaISA::MISCREG_IPR_HWINT_CLR:
< case AlphaISA::MISCREG_IPR_SL_XMIT:
< case AlphaISA::MISCREG_IPR_DC_FLUSH:
< case AlphaISA::MISCREG_IPR_IC_FLUSH:
---
> case AlphaISA::IPR_HWINT_CLR:
> case AlphaISA::IPR_SL_XMIT:
> case AlphaISA::IPR_DC_FLUSH:
> case AlphaISA::IPR_IC_FLUSH:
456c456
< case AlphaISA::MISCREG_IPR_DTB_IA:
---
> case AlphaISA::IPR_DTB_IA:
463c463
< case AlphaISA::MISCREG_IPR_DTB_IAP:
---
> case AlphaISA::IPR_DTB_IAP:
470c470
< case AlphaISA::MISCREG_IPR_DTB_IS:
---
> case AlphaISA::IPR_DTB_IS:
475c475
< DTB_ASN_ASN(ipr[AlphaISA::MISCREG_IPR_DTB_ASN]));
---
> DTB_ASN_ASN(ipr[AlphaISA::IPR_DTB_ASN]));
478c478
< case AlphaISA::MISCREG_IPR_DTB_TAG: {
---
> case AlphaISA::IPR_DTB_TAG: {
482c482
< if (DTB_PTE_GH(ipr[AlphaISA::MISCREG_IPR_DTB_PTE]) != 0)
---
> if (DTB_PTE_GH(ipr[AlphaISA::IPR_DTB_PTE]) != 0)
489,495c489,495
< pte.ppn = DTB_PTE_PPN(ipr[AlphaISA::MISCREG_IPR_DTB_PTE]);
< pte.xre = DTB_PTE_XRE(ipr[AlphaISA::MISCREG_IPR_DTB_PTE]);
< pte.xwe = DTB_PTE_XWE(ipr[AlphaISA::MISCREG_IPR_DTB_PTE]);
< pte.fonr = DTB_PTE_FONR(ipr[AlphaISA::MISCREG_IPR_DTB_PTE]);
< pte.fonw = DTB_PTE_FONW(ipr[AlphaISA::MISCREG_IPR_DTB_PTE]);
< pte.asma = DTB_PTE_ASMA(ipr[AlphaISA::MISCREG_IPR_DTB_PTE]);
< pte.asn = DTB_ASN_ASN(ipr[AlphaISA::MISCREG_IPR_DTB_ASN]);
---
> pte.ppn = DTB_PTE_PPN(ipr[AlphaISA::IPR_DTB_PTE]);
> pte.xre = DTB_PTE_XRE(ipr[AlphaISA::IPR_DTB_PTE]);
> pte.xwe = DTB_PTE_XWE(ipr[AlphaISA::IPR_DTB_PTE]);
> pte.fonr = DTB_PTE_FONR(ipr[AlphaISA::IPR_DTB_PTE]);
> pte.fonw = DTB_PTE_FONW(ipr[AlphaISA::IPR_DTB_PTE]);
> pte.asma = DTB_PTE_ASMA(ipr[AlphaISA::IPR_DTB_PTE]);
> pte.asn = DTB_ASN_ASN(ipr[AlphaISA::IPR_DTB_ASN]);
502c502
< case AlphaISA::MISCREG_IPR_ITB_PTE: {
---
> case AlphaISA::IPR_ITB_PTE: {
519c519
< pte.asn = ITB_ASN_ASN(ipr[AlphaISA::MISCREG_IPR_ITB_ASN]);
---
> pte.asn = ITB_ASN_ASN(ipr[AlphaISA::IPR_ITB_ASN]);
522c522
< tc->getITBPtr()->insert(ipr[AlphaISA::MISCREG_IPR_ITB_TAG], pte);
---
> tc->getITBPtr()->insert(ipr[AlphaISA::IPR_ITB_TAG], pte);
526c526
< case AlphaISA::MISCREG_IPR_ITB_IA:
---
> case AlphaISA::IPR_ITB_IA:
533c533
< case AlphaISA::MISCREG_IPR_ITB_IAP:
---
> case AlphaISA::IPR_ITB_IAP:
540c540
< case AlphaISA::MISCREG_IPR_ITB_IS:
---
> case AlphaISA::IPR_ITB_IS:
545c545
< ITB_ASN_ASN(ipr[AlphaISA::MISCREG_IPR_ITB_ASN]));
---
> ITB_ASN_ASN(ipr[AlphaISA::IPR_ITB_ASN]));