decoder.hh (9478:ba80f7d4f452) decoder.hh (11165:d90aec9435bd)
1/*
2 * Copyright (c) 2012 Google
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __ARCH_ALPHA_DECODER_HH__
32#define __ARCH_ALPHA_DECODER_HH__
33
34#include "arch/generic/decode_cache.hh"
35#include "arch/types.hh"
36#include "cpu/static_inst.hh"
37#include "sim/full_system.hh"
38
39namespace AlphaISA
40{
41
1/*
2 * Copyright (c) 2012 Google
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __ARCH_ALPHA_DECODER_HH__
32#define __ARCH_ALPHA_DECODER_HH__
33
34#include "arch/generic/decode_cache.hh"
35#include "arch/types.hh"
36#include "cpu/static_inst.hh"
37#include "sim/full_system.hh"
38
39namespace AlphaISA
40{
41
42class ISA;
42class Decoder
43{
44 protected:
45 // The extended machine instruction being generated
46 ExtMachInst ext_inst;
47 bool instDone;
48
49 public:
43class Decoder
44{
45 protected:
46 // The extended machine instruction being generated
47 ExtMachInst ext_inst;
48 bool instDone;
49
50 public:
50 Decoder() : instDone(false)
51 Decoder(ISA* isa = nullptr) : instDone(false)
51 {}
52
53 void
54 process()
55 { }
56
57 void
58 reset()
59 {
60 instDone = false;
61 }
62
63 // Use this to give data to the predecoder. This should be used
64 // when there is control flow.
65 void
66 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
67 {
68 ext_inst = inst;
69 instDone = true;
70 if (FullSystem)
71 ext_inst |= (static_cast<ExtMachInst>(pc.pc() & 0x1) << 32);
72 }
73
74 bool
75 needMoreBytes()
76 {
77 return true;
78 }
79
80 bool
81 instReady()
82 {
83 return instDone;
84 }
85
86 void takeOverFrom(Decoder * old) {}
87
88 protected:
89 /// A cache of decoded instruction objects.
90 static GenericISA::BasicDecodeCache defaultCache;
91
92 public:
93 StaticInstPtr decodeInst(ExtMachInst mach_inst);
94
95 /// Decode a machine instruction.
96 /// @param mach_inst The binary instruction to decode.
97 /// @retval A pointer to the corresponding StaticInst object.
98 StaticInstPtr
99 decode(ExtMachInst mach_inst, Addr addr)
100 {
101 return defaultCache.decode(this, mach_inst, addr);
102 }
103
104 StaticInstPtr
105 decode(AlphaISA::PCState &nextPC)
106 {
107 if (!instDone)
108 return NULL;
109 instDone = false;
110 return decode(ext_inst, nextPC.instAddr());
111 }
112};
113
114} // namespace AlphaISA
115
116#endif // __ARCH_ALPHA_DECODER_HH__
52 {}
53
54 void
55 process()
56 { }
57
58 void
59 reset()
60 {
61 instDone = false;
62 }
63
64 // Use this to give data to the predecoder. This should be used
65 // when there is control flow.
66 void
67 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst)
68 {
69 ext_inst = inst;
70 instDone = true;
71 if (FullSystem)
72 ext_inst |= (static_cast<ExtMachInst>(pc.pc() & 0x1) << 32);
73 }
74
75 bool
76 needMoreBytes()
77 {
78 return true;
79 }
80
81 bool
82 instReady()
83 {
84 return instDone;
85 }
86
87 void takeOverFrom(Decoder * old) {}
88
89 protected:
90 /// A cache of decoded instruction objects.
91 static GenericISA::BasicDecodeCache defaultCache;
92
93 public:
94 StaticInstPtr decodeInst(ExtMachInst mach_inst);
95
96 /// Decode a machine instruction.
97 /// @param mach_inst The binary instruction to decode.
98 /// @retval A pointer to the corresponding StaticInst object.
99 StaticInstPtr
100 decode(ExtMachInst mach_inst, Addr addr)
101 {
102 return defaultCache.decode(this, mach_inst, addr);
103 }
104
105 StaticInstPtr
106 decode(AlphaISA::PCState &nextPC)
107 {
108 if (!instDone)
109 return NULL;
110 instDone = false;
111 return decode(ext_inst, nextPC.instAddr());
112 }
113};
114
115} // namespace AlphaISA
116
117#endif // __ARCH_ALPHA_DECODER_HH__