| SConscript (8887:20ea02da9c53) | SConscript (8961:ff4762285f99) |
|---|---|
| 1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28# 29# Authors: Steve Reinhardt 30 31import sys | 1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28# 29# Authors: Steve Reinhardt 30 31import sys |
| 32import os |
|
| 32 33Import('*') 34 35################################################################# 36# 37# ISA "switch header" generation. 38# 39# Auto-generate arch headers that include the right ISA-specific --- 62 unchanged lines hidden (view full) --- 102 # We also get an execute file for each selected CPU model. 103 target += [CpuModel.dict[cpu].filename for cpu in cpu_models] 104 105 # List the isa parser as a source. 106 source += [ isa_parser ] 107 # Add in the CPU models. 108 source += [ Value(m) for m in cpu_models ] 109 | 33 34Import('*') 35 36################################################################# 37# 38# ISA "switch header" generation. 39# 40# Auto-generate arch headers that include the right ISA-specific --- 62 unchanged lines hidden (view full) --- 103 # We also get an execute file for each selected CPU model. 104 target += [CpuModel.dict[cpu].filename for cpu in cpu_models] 105 106 # List the isa parser as a source. 107 source += [ isa_parser ] 108 # Add in the CPU models. 109 source += [ Value(m) for m in cpu_models ] 110 |
| 110 return target, source | 111 return [os.path.join("generated", t) for t in target], source |
| 111 112ARCH_DIR = Dir('.') 113 114# import ply here because SCons screws with sys.path when performing actions. 115import ply 116 117def isa_desc_action_func(target, source, env): 118 # Add the current directory to the system path so we can import files --- 20 unchanged lines hidden --- | 112 113ARCH_DIR = Dir('.') 114 115# import ply here because SCons screws with sys.path when performing actions. 116import ply 117 118def isa_desc_action_func(target, source, env): 119 # Add the current directory to the system path so we can import files --- 20 unchanged lines hidden --- |