SConscript (8584:26ece1659229) SConscript (8585:e21224136182)
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

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116# import ply here because SCons screws with sys.path when performing actions.
117import ply
118
119def isa_desc_action_func(target, source, env):
120 # Add the current directory to the system path so we can import files
121 sys.path[0:0] = [ ARCH_DIR.srcnode().abspath ]
122 import isa_parser
123
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 107 unchanged lines hidden (view full) ---

116# import ply here because SCons screws with sys.path when performing actions.
117import ply
118
119def isa_desc_action_func(target, source, env):
120 # Add the current directory to the system path so we can import files
121 sys.path[0:0] = [ ARCH_DIR.srcnode().abspath ]
122 import isa_parser
123
124 # Skip over the ISA description itself and the parser to the CPU models.
124 models = [ s.get_contents() for s in source[2:] ]
125 cpu_models = [CpuModel.dict[cpu] for cpu in models]
126 parser = isa_parser.ISAParser(target[0].dir.abspath, cpu_models)
127 parser.parse_isa_desc(source[0].abspath)
128isa_desc_action = MakeAction(isa_desc_action_func, Transform("ISA DESC", 1))
129
130# Also include the CheckerCPU as one of the models if it is being
131# enabled via command line.
132isa_desc_builder = Builder(action=isa_desc_action, emitter=isa_desc_emitter)
133
134env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder })
135
136DebugFlag('IntRegs')
137DebugFlag('FloatRegs')
138DebugFlag('MiscRegs')
139CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'MiscRegs' ])
125 models = [ s.get_contents() for s in source[2:] ]
126 cpu_models = [CpuModel.dict[cpu] for cpu in models]
127 parser = isa_parser.ISAParser(target[0].dir.abspath, cpu_models)
128 parser.parse_isa_desc(source[0].abspath)
129isa_desc_action = MakeAction(isa_desc_action_func, Transform("ISA DESC", 1))
130
131# Also include the CheckerCPU as one of the models if it is being
132# enabled via command line.
133isa_desc_builder = Builder(action=isa_desc_action, emitter=isa_desc_emitter)
134
135env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder })
136
137DebugFlag('IntRegs')
138DebugFlag('FloatRegs')
139DebugFlag('MiscRegs')
140CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'MiscRegs' ])