SConscript (5664:3b3756efad89) | SConscript (5944:60d926a40afd) |
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1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 112 unchanged lines hidden (view full) --- 121if env['USE_CHECKER']: 122 isa_desc_builder = Builder(action=python + ' $SOURCES $TARGET.dir $CPU_MODELS CheckerCPU', 123 emitter = isa_desc_emitter) 124else: 125 isa_desc_builder = Builder(action=python + ' $SOURCES $TARGET.dir $CPU_MODELS', 126 emitter = isa_desc_emitter) 127 128env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder }) | 1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 112 unchanged lines hidden (view full) --- 121if env['USE_CHECKER']: 122 isa_desc_builder = Builder(action=python + ' $SOURCES $TARGET.dir $CPU_MODELS CheckerCPU', 123 emitter = isa_desc_emitter) 124else: 125 isa_desc_builder = Builder(action=python + ' $SOURCES $TARGET.dir $CPU_MODELS', 126 emitter = isa_desc_emitter) 127 128env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder }) |
129 130TraceFlag('IntRegs') 131TraceFlag('FloatRegs') 132TraceFlag('MiscRegs') 133CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'MiscRegs' ]) |
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