| SConscript (12462:abdd0f6a2593) | SConscript (13610:5d5404ac6288) |
|---|---|
| 1# -*- mode:python -*- 2 | 1# -*- mode:python -*- 2 |
| 3# Copyright (c) 2016 ARM Limited | 3# Copyright (c) 2016-2017 ARM Limited |
| 4# All rights reserved. 5# 6# The license below extends only to copyright in the software and shall 7# not be construed as granting a license to any other intellectual 8# property including but not limited to intellectual property relating 9# to a hardware implementation of the functionality of the software 10# licensed hereunder. You may use the software subject to the license 11# terms below provided that you ensure that this notice is replicated --- 209 unchanged lines hidden (view full) --- 221 IsaDescBuilder(target=gen, source=sources, env=env) 222 return gen 223 224Export('ISADesc') 225 226DebugFlag('IntRegs') 227DebugFlag('FloatRegs') 228DebugFlag('VecRegs') | 4# All rights reserved. 5# 6# The license below extends only to copyright in the software and shall 7# not be construed as granting a license to any other intellectual 8# property including but not limited to intellectual property relating 9# to a hardware implementation of the functionality of the software 10# licensed hereunder. You may use the software subject to the license 11# terms below provided that you ensure that this notice is replicated --- 209 unchanged lines hidden (view full) --- 221 IsaDescBuilder(target=gen, source=sources, env=env) 222 return gen 223 224Export('ISADesc') 225 226DebugFlag('IntRegs') 227DebugFlag('FloatRegs') 228DebugFlag('VecRegs') |
| 229DebugFlag('VecPredRegs') |
|
| 229DebugFlag('CCRegs') 230DebugFlag('MiscRegs') | 230DebugFlag('CCRegs') 231DebugFlag('MiscRegs') |
| 231CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'CCRegs', 'MiscRegs' ]) | 232CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'VecRegs', 'VecPredRegs', 233 'CCRegs', 'MiscRegs' ]) |