SConscript (11696:80c30bd0c7d6) SConscript (12015:469a2f126b4c)
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright
9# notice, this list of conditions and the following disclaimer;
10# redistributions in binary form must reproduce the above copyright
11# notice, this list of conditions and the following disclaimer in the
12# documentation and/or other materials provided with the distribution;
13# neither the name of the copyright holders nor the names of its
14# contributors may be used to endorse or promote products derived from
15# this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28#
29# Authors: Steve Reinhardt
30
31import sys
32import os
33import re
34
35Import('*')
36
37#################################################################
38#
39# ISA "switch header" generation.
40#
41# Auto-generate arch headers that include the right ISA-specific
42# header based on the setting of THE_ISA preprocessor variable.
43#
44#################################################################
45
1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright
9# notice, this list of conditions and the following disclaimer;
10# redistributions in binary form must reproduce the above copyright
11# notice, this list of conditions and the following disclaimer in the
12# documentation and/or other materials provided with the distribution;
13# neither the name of the copyright holders nor the names of its
14# contributors may be used to endorse or promote products derived from
15# this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28#
29# Authors: Steve Reinhardt
30
31import sys
32import os
33import re
34
35Import('*')
36
37#################################################################
38#
39# ISA "switch header" generation.
40#
41# Auto-generate arch headers that include the right ISA-specific
42# header based on the setting of THE_ISA preprocessor variable.
43#
44#################################################################
45
46# List of headers to generate
47isa_switch_hdrs = Split('''
46env.SwitchingHeaders(
47 Split('''
48 decoder.hh
49 interrupts.hh
50 isa.hh
51 isa_traits.hh
52 kernel_stats.hh
53 locked_mem.hh
54 microcode_rom.hh
55 mmapped_ipr.hh
56 mt.hh
57 process.hh
58 pseudo_inst.hh
59 registers.hh
60 remote_gdb.hh
61 stacktrace.hh
62 tlb.hh
63 types.hh
64 utility.hh
65 vtophys.hh
48 decoder.hh
49 interrupts.hh
50 isa.hh
51 isa_traits.hh
52 kernel_stats.hh
53 locked_mem.hh
54 microcode_rom.hh
55 mmapped_ipr.hh
56 mt.hh
57 process.hh
58 pseudo_inst.hh
59 registers.hh
60 remote_gdb.hh
61 stacktrace.hh
62 tlb.hh
63 types.hh
64 utility.hh
65 vtophys.hh
66 ''')
66 '''),
67 env.subst('${TARGET_ISA}'))
67
68
68# Set up this directory to support switching headers
69make_switching_dir('arch', isa_switch_hdrs, env)
70
71if env['BUILD_GPU']:
72 gpu_isa_switch_hdrs = Split('''
73 gpu_decoder.hh
74 gpu_isa.hh
75 gpu_types.hh
76 ''')
77
78 make_gpu_switching_dir('arch', gpu_isa_switch_hdrs, env)
79
80#################################################################
81#
82# Include architecture-specific files.
83#
84#################################################################
85
86#
87# Build a SCons scanner for ISA files
88#
89import SCons.Scanner
90
91isa_scanner = SCons.Scanner.Classic("ISAScan",
92 [".isa", ".ISA"],
93 "SRCDIR",
94 r'^\s*##include\s+"([\w/.-]*)"')
95
96env.Append(SCANNERS = isa_scanner)
97
98#
99# Now create a Builder object that uses isa_parser.py to generate C++
100# output from the ISA description (*.isa) files.
101#
102
103isa_parser = File('isa_parser.py')
104
105# The emitter patches up the sources & targets to include the
106# autogenerated files as targets and isa parser itself as a source.
107def isa_desc_emitter(target, source, env):
108 # List the isa parser as a source.
109 source += [
110 isa_parser,
111 Value("ExecContext"),
112 ]
113
114 # Specify different targets depending on if we're running the ISA
115 # parser for its dependency information, or for the generated files.
116 # (As an optimization, the ISA parser detects the useless second run
117 # and skips doing any work, if the first run was performed, since it
118 # always generates all its files). The way we track this in SCons is the
119 # <arch>_isa_outputs value in the environment (env). If it's unset, we
120 # don't know what the dependencies are so we ask for generated/inc.d to
121 # be generated so they can be acquired. If we know what they are, then
122 # it's because we've already processed inc.d and then claim that our
123 # outputs (targets) will be thus.
124 isa = env['TARGET_ISA']
125 key = '%s_isa_outputs' % isa
126 if key in env:
127 targets = [ os.path.join('generated', f) for f in env[key] ]
128 else:
129 targets = [ os.path.join('generated','inc.d') ]
130
131 def prefix(s):
132 return os.path.join(target[0].dir.up().abspath, s)
133
134 return [ prefix(t) for t in targets ], source
135
136ARCH_DIR = Dir('.')
137
138# import ply here because SCons screws with sys.path when performing actions.
139import ply
140
141def isa_desc_action_func(target, source, env):
142 # Add the current directory to the system path so we can import files
143 sys.path[0:0] = [ ARCH_DIR.srcnode().abspath ]
144 import isa_parser
145
146 # Skip over the ISA description itself and the parser to the CPU models.
147 models = [ s.get_contents() for s in source[2:] ]
148 parser = isa_parser.ISAParser(target[0].dir.abspath)
149 parser.parse_isa_desc(source[0].abspath)
150isa_desc_action = MakeAction(isa_desc_action_func, Transform("ISA DESC", 1))
151
152# Also include the CheckerCPU as one of the models if it is being
153# enabled via command line.
154isa_desc_builder = Builder(action=isa_desc_action, emitter=isa_desc_emitter)
155
156env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder })
157
158# The ISA is generated twice: the first time to find out what it generates,
159# and the second time to make scons happy by telling the ISADesc builder
160# what it will make before it builds it.
161def scan_isa_deps(target, source, env):
162 # Process dependency file generated by the ISA parser --
163 # add the listed files to the dependency tree of the build.
164 source = source[0]
165 archbase = source.dir.up().path
166
167 try:
168 depfile = open(source.abspath, 'r')
169 except:
170 print "scan_isa_deps: Can't open ISA deps file '%s' in %s" % \
171 (source.path,os.getcwd())
172 raise
173
174 # Scan through the lines
175 targets = {}
176 for line in depfile:
177 # Read the dependency line with the format
178 # <target file>: [ <dependent file>* ]
179 m = re.match(r'^\s*([^:]+\.([^\.:]+))\s*:\s*(.*)', line)
180 assert(m)
181 targ, extn = m.group(1,2)
182 deps = m.group(3).split()
183
184 files = [ targ ] + deps
185 for f in files:
186 targets[f] = True
187 # Eliminate unnecessary re-generation if we already generated it
188 env.Precious(os.path.join(archbase, 'generated', f))
189
190 files = [ os.path.join(archbase, 'generated', f) for f in files ]
191
192 if extn == 'cc':
193 Source(os.path.join(archbase,'generated', targ))
194 depfile.close()
195 env[env['TARGET_ISA'] + '_isa_outputs'] = targets.keys()
196
197 isa = env.ISADesc(os.path.join(archbase,'isa','main.isa'))
198 for t in targets:
199 env.Depends('#all-isas', isa)
200
201env.Append(BUILDERS = {'ScanISA' :
202 Builder(action=MakeAction(scan_isa_deps,
203 Transform("NEW DEPS", 1)))})
204
205DebugFlag('IntRegs')
206DebugFlag('FloatRegs')
207DebugFlag('CCRegs')
208DebugFlag('MiscRegs')
209CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'CCRegs', 'MiscRegs' ])
69if env['BUILD_GPU']:
70 gpu_isa_switch_hdrs = Split('''
71 gpu_decoder.hh
72 gpu_isa.hh
73 gpu_types.hh
74 ''')
75
76 make_gpu_switching_dir('arch', gpu_isa_switch_hdrs, env)
77
78#################################################################
79#
80# Include architecture-specific files.
81#
82#################################################################
83
84#
85# Build a SCons scanner for ISA files
86#
87import SCons.Scanner
88
89isa_scanner = SCons.Scanner.Classic("ISAScan",
90 [".isa", ".ISA"],
91 "SRCDIR",
92 r'^\s*##include\s+"([\w/.-]*)"')
93
94env.Append(SCANNERS = isa_scanner)
95
96#
97# Now create a Builder object that uses isa_parser.py to generate C++
98# output from the ISA description (*.isa) files.
99#
100
101isa_parser = File('isa_parser.py')
102
103# The emitter patches up the sources & targets to include the
104# autogenerated files as targets and isa parser itself as a source.
105def isa_desc_emitter(target, source, env):
106 # List the isa parser as a source.
107 source += [
108 isa_parser,
109 Value("ExecContext"),
110 ]
111
112 # Specify different targets depending on if we're running the ISA
113 # parser for its dependency information, or for the generated files.
114 # (As an optimization, the ISA parser detects the useless second run
115 # and skips doing any work, if the first run was performed, since it
116 # always generates all its files). The way we track this in SCons is the
117 # <arch>_isa_outputs value in the environment (env). If it's unset, we
118 # don't know what the dependencies are so we ask for generated/inc.d to
119 # be generated so they can be acquired. If we know what they are, then
120 # it's because we've already processed inc.d and then claim that our
121 # outputs (targets) will be thus.
122 isa = env['TARGET_ISA']
123 key = '%s_isa_outputs' % isa
124 if key in env:
125 targets = [ os.path.join('generated', f) for f in env[key] ]
126 else:
127 targets = [ os.path.join('generated','inc.d') ]
128
129 def prefix(s):
130 return os.path.join(target[0].dir.up().abspath, s)
131
132 return [ prefix(t) for t in targets ], source
133
134ARCH_DIR = Dir('.')
135
136# import ply here because SCons screws with sys.path when performing actions.
137import ply
138
139def isa_desc_action_func(target, source, env):
140 # Add the current directory to the system path so we can import files
141 sys.path[0:0] = [ ARCH_DIR.srcnode().abspath ]
142 import isa_parser
143
144 # Skip over the ISA description itself and the parser to the CPU models.
145 models = [ s.get_contents() for s in source[2:] ]
146 parser = isa_parser.ISAParser(target[0].dir.abspath)
147 parser.parse_isa_desc(source[0].abspath)
148isa_desc_action = MakeAction(isa_desc_action_func, Transform("ISA DESC", 1))
149
150# Also include the CheckerCPU as one of the models if it is being
151# enabled via command line.
152isa_desc_builder = Builder(action=isa_desc_action, emitter=isa_desc_emitter)
153
154env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder })
155
156# The ISA is generated twice: the first time to find out what it generates,
157# and the second time to make scons happy by telling the ISADesc builder
158# what it will make before it builds it.
159def scan_isa_deps(target, source, env):
160 # Process dependency file generated by the ISA parser --
161 # add the listed files to the dependency tree of the build.
162 source = source[0]
163 archbase = source.dir.up().path
164
165 try:
166 depfile = open(source.abspath, 'r')
167 except:
168 print "scan_isa_deps: Can't open ISA deps file '%s' in %s" % \
169 (source.path,os.getcwd())
170 raise
171
172 # Scan through the lines
173 targets = {}
174 for line in depfile:
175 # Read the dependency line with the format
176 # <target file>: [ <dependent file>* ]
177 m = re.match(r'^\s*([^:]+\.([^\.:]+))\s*:\s*(.*)', line)
178 assert(m)
179 targ, extn = m.group(1,2)
180 deps = m.group(3).split()
181
182 files = [ targ ] + deps
183 for f in files:
184 targets[f] = True
185 # Eliminate unnecessary re-generation if we already generated it
186 env.Precious(os.path.join(archbase, 'generated', f))
187
188 files = [ os.path.join(archbase, 'generated', f) for f in files ]
189
190 if extn == 'cc':
191 Source(os.path.join(archbase,'generated', targ))
192 depfile.close()
193 env[env['TARGET_ISA'] + '_isa_outputs'] = targets.keys()
194
195 isa = env.ISADesc(os.path.join(archbase,'isa','main.isa'))
196 for t in targets:
197 env.Depends('#all-isas', isa)
198
199env.Append(BUILDERS = {'ScanISA' :
200 Builder(action=MakeAction(scan_isa_deps,
201 Transform("NEW DEPS", 1)))})
202
203DebugFlag('IntRegs')
204DebugFlag('FloatRegs')
205DebugFlag('CCRegs')
206DebugFlag('MiscRegs')
207CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'CCRegs', 'MiscRegs' ])