1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright
9# notice, this list of conditions and the following disclaimer;
10# redistributions in binary form must reproduce the above copyright
11# notice, this list of conditions and the following disclaimer in the
12# documentation and/or other materials provided with the distribution;
13# neither the name of the copyright holders nor the names of its
14# contributors may be used to endorse or promote products derived from
15# this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28#
29# Authors: Steve Reinhardt
30
31import sys
32import os
33import re
34
35Import('*')
36
37#################################################################
38#
39# ISA "switch header" generation.
40#
41# Auto-generate arch headers that include the right ISA-specific
42# header based on the setting of THE_ISA preprocessor variable.
43#
44#################################################################
45
46# List of headers to generate
47isa_switch_hdrs = Split('''
48 decoder.hh
49 interrupts.hh
50 isa.hh
51 isa_traits.hh
52 kernel_stats.hh
53 locked_mem.hh
54 microcode_rom.hh
55 mmapped_ipr.hh
56 mt.hh
57 process.hh
| 1# -*- mode:python -*-
2
3# Copyright (c) 2006 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright
9# notice, this list of conditions and the following disclaimer;
10# redistributions in binary form must reproduce the above copyright
11# notice, this list of conditions and the following disclaimer in the
12# documentation and/or other materials provided with the distribution;
13# neither the name of the copyright holders nor the names of its
14# contributors may be used to endorse or promote products derived from
15# this software without specific prior written permission.
16#
17# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28#
29# Authors: Steve Reinhardt
30
31import sys
32import os
33import re
34
35Import('*')
36
37#################################################################
38#
39# ISA "switch header" generation.
40#
41# Auto-generate arch headers that include the right ISA-specific
42# header based on the setting of THE_ISA preprocessor variable.
43#
44#################################################################
45
46# List of headers to generate
47isa_switch_hdrs = Split('''
48 decoder.hh
49 interrupts.hh
50 isa.hh
51 isa_traits.hh
52 kernel_stats.hh
53 locked_mem.hh
54 microcode_rom.hh
55 mmapped_ipr.hh
56 mt.hh
57 process.hh
|
58 registers.hh
59 remote_gdb.hh
60 stacktrace.hh
61 tlb.hh
62 types.hh
63 utility.hh
64 vtophys.hh
65 ''')
66
67# Set up this directory to support switching headers
68make_switching_dir('arch', isa_switch_hdrs, env)
69
70#################################################################
71#
72# Include architecture-specific files.
73#
74#################################################################
75
76#
77# Build a SCons scanner for ISA files
78#
79import SCons.Scanner
80
81isa_scanner = SCons.Scanner.Classic("ISAScan",
82 [".isa", ".ISA"],
83 "SRCDIR",
84 r'^\s*##include\s+"([\w/.-]*)"')
85
86env.Append(SCANNERS = isa_scanner)
87
88#
89# Now create a Builder object that uses isa_parser.py to generate C++
90# output from the ISA description (*.isa) files.
91#
92
93isa_parser = File('isa_parser.py')
94
95# The emitter patches up the sources & targets to include the
96# autogenerated files as targets and isa parser itself as a source.
97def isa_desc_emitter(target, source, env):
98 # List the isa parser as a source.
99 source += [
100 isa_parser,
101 Value("ExecContext"),
102 ]
103
104 # Specify different targets depending on if we're running the ISA
105 # parser for its dependency information, or for the generated files.
106 # (As an optimization, the ISA parser detects the useless second run
107 # and skips doing any work, if the first run was performed, since it
108 # always generates all its files). The way we track this in SCons is the
109 # <arch>_isa_outputs value in the environment (env). If it's unset, we
110 # don't know what the dependencies are so we ask for generated/inc.d to
111 # be generated so they can be acquired. If we know what they are, then
112 # it's because we've already processed inc.d and then claim that our
113 # outputs (targets) will be thus.
114 isa = env['TARGET_ISA']
115 key = '%s_isa_outputs' % isa
116 if key in env:
117 targets = [ os.path.join('generated', f) for f in env[key] ]
118 else:
119 targets = [ os.path.join('generated','inc.d') ]
120
121 def prefix(s):
122 return os.path.join(target[0].dir.up().abspath, s)
123
124 return [ prefix(t) for t in targets ], source
125
126ARCH_DIR = Dir('.')
127
128# import ply here because SCons screws with sys.path when performing actions.
129import ply
130
131def isa_desc_action_func(target, source, env):
132 # Add the current directory to the system path so we can import files
133 sys.path[0:0] = [ ARCH_DIR.srcnode().abspath ]
134 import isa_parser
135
136 # Skip over the ISA description itself and the parser to the CPU models.
137 models = [ s.get_contents() for s in source[2:] ]
138 parser = isa_parser.ISAParser(target[0].dir.abspath)
139 parser.parse_isa_desc(source[0].abspath)
140isa_desc_action = MakeAction(isa_desc_action_func, Transform("ISA DESC", 1))
141
142# Also include the CheckerCPU as one of the models if it is being
143# enabled via command line.
144isa_desc_builder = Builder(action=isa_desc_action, emitter=isa_desc_emitter)
145
146env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder })
147
148# The ISA is generated twice: the first time to find out what it generates,
149# and the second time to make scons happy by telling the ISADesc builder
150# what it will make before it builds it.
151def scan_isa_deps(target, source, env):
152 # Process dependency file generated by the ISA parser --
153 # add the listed files to the dependency tree of the build.
154 source = source[0]
155 archbase = source.dir.up().path
156
157 try:
158 depfile = open(source.abspath, 'r')
159 except:
160 print "scan_isa_deps: Can't open ISA deps file '%s' in %s" % \
161 (source.path,os.getcwd())
162 raise
163
164 # Scan through the lines
165 targets = {}
166 for line in depfile:
167 # Read the dependency line with the format
168 # <target file>: [ <dependent file>* ]
169 m = re.match(r'^\s*([^:]+\.([^\.:]+))\s*:\s*(.*)', line)
170 assert(m)
171 targ, extn = m.group(1,2)
172 deps = m.group(3).split()
173
174 files = [ targ ] + deps
175 for f in files:
176 targets[f] = True
177 # Eliminate unnecessary re-generation if we already generated it
178 env.Precious(os.path.join(archbase, 'generated', f))
179
180 files = [ os.path.join(archbase, 'generated', f) for f in files ]
181
182 if extn == 'cc':
183 Source(os.path.join(archbase,'generated', targ))
184 depfile.close()
185 env[env['TARGET_ISA'] + '_isa_outputs'] = targets.keys()
186
187 isa = env.ISADesc(os.path.join(archbase,'isa','main.isa'))
188 for t in targets:
189 env.Depends('#all-isas', isa)
190
191env.Append(BUILDERS = {'ScanISA' :
192 Builder(action=MakeAction(scan_isa_deps,
193 Transform("NEW DEPS", 1)))})
194
195DebugFlag('IntRegs')
196DebugFlag('FloatRegs')
197DebugFlag('CCRegs')
198DebugFlag('MiscRegs')
199CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'CCRegs', 'MiscRegs' ])
| 59 registers.hh
60 remote_gdb.hh
61 stacktrace.hh
62 tlb.hh
63 types.hh
64 utility.hh
65 vtophys.hh
66 ''')
67
68# Set up this directory to support switching headers
69make_switching_dir('arch', isa_switch_hdrs, env)
70
71#################################################################
72#
73# Include architecture-specific files.
74#
75#################################################################
76
77#
78# Build a SCons scanner for ISA files
79#
80import SCons.Scanner
81
82isa_scanner = SCons.Scanner.Classic("ISAScan",
83 [".isa", ".ISA"],
84 "SRCDIR",
85 r'^\s*##include\s+"([\w/.-]*)"')
86
87env.Append(SCANNERS = isa_scanner)
88
89#
90# Now create a Builder object that uses isa_parser.py to generate C++
91# output from the ISA description (*.isa) files.
92#
93
94isa_parser = File('isa_parser.py')
95
96# The emitter patches up the sources & targets to include the
97# autogenerated files as targets and isa parser itself as a source.
98def isa_desc_emitter(target, source, env):
99 # List the isa parser as a source.
100 source += [
101 isa_parser,
102 Value("ExecContext"),
103 ]
104
105 # Specify different targets depending on if we're running the ISA
106 # parser for its dependency information, or for the generated files.
107 # (As an optimization, the ISA parser detects the useless second run
108 # and skips doing any work, if the first run was performed, since it
109 # always generates all its files). The way we track this in SCons is the
110 # <arch>_isa_outputs value in the environment (env). If it's unset, we
111 # don't know what the dependencies are so we ask for generated/inc.d to
112 # be generated so they can be acquired. If we know what they are, then
113 # it's because we've already processed inc.d and then claim that our
114 # outputs (targets) will be thus.
115 isa = env['TARGET_ISA']
116 key = '%s_isa_outputs' % isa
117 if key in env:
118 targets = [ os.path.join('generated', f) for f in env[key] ]
119 else:
120 targets = [ os.path.join('generated','inc.d') ]
121
122 def prefix(s):
123 return os.path.join(target[0].dir.up().abspath, s)
124
125 return [ prefix(t) for t in targets ], source
126
127ARCH_DIR = Dir('.')
128
129# import ply here because SCons screws with sys.path when performing actions.
130import ply
131
132def isa_desc_action_func(target, source, env):
133 # Add the current directory to the system path so we can import files
134 sys.path[0:0] = [ ARCH_DIR.srcnode().abspath ]
135 import isa_parser
136
137 # Skip over the ISA description itself and the parser to the CPU models.
138 models = [ s.get_contents() for s in source[2:] ]
139 parser = isa_parser.ISAParser(target[0].dir.abspath)
140 parser.parse_isa_desc(source[0].abspath)
141isa_desc_action = MakeAction(isa_desc_action_func, Transform("ISA DESC", 1))
142
143# Also include the CheckerCPU as one of the models if it is being
144# enabled via command line.
145isa_desc_builder = Builder(action=isa_desc_action, emitter=isa_desc_emitter)
146
147env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder })
148
149# The ISA is generated twice: the first time to find out what it generates,
150# and the second time to make scons happy by telling the ISADesc builder
151# what it will make before it builds it.
152def scan_isa_deps(target, source, env):
153 # Process dependency file generated by the ISA parser --
154 # add the listed files to the dependency tree of the build.
155 source = source[0]
156 archbase = source.dir.up().path
157
158 try:
159 depfile = open(source.abspath, 'r')
160 except:
161 print "scan_isa_deps: Can't open ISA deps file '%s' in %s" % \
162 (source.path,os.getcwd())
163 raise
164
165 # Scan through the lines
166 targets = {}
167 for line in depfile:
168 # Read the dependency line with the format
169 # <target file>: [ <dependent file>* ]
170 m = re.match(r'^\s*([^:]+\.([^\.:]+))\s*:\s*(.*)', line)
171 assert(m)
172 targ, extn = m.group(1,2)
173 deps = m.group(3).split()
174
175 files = [ targ ] + deps
176 for f in files:
177 targets[f] = True
178 # Eliminate unnecessary re-generation if we already generated it
179 env.Precious(os.path.join(archbase, 'generated', f))
180
181 files = [ os.path.join(archbase, 'generated', f) for f in files ]
182
183 if extn == 'cc':
184 Source(os.path.join(archbase,'generated', targ))
185 depfile.close()
186 env[env['TARGET_ISA'] + '_isa_outputs'] = targets.keys()
187
188 isa = env.ISADesc(os.path.join(archbase,'isa','main.isa'))
189 for t in targets:
190 env.Depends('#all-isas', isa)
191
192env.Append(BUILDERS = {'ScanISA' :
193 Builder(action=MakeAction(scan_isa_deps,
194 Transform("NEW DEPS", 1)))})
195
196DebugFlag('IntRegs')
197DebugFlag('FloatRegs')
198DebugFlag('CCRegs')
199DebugFlag('MiscRegs')
200CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'CCRegs', 'MiscRegs' ])
|