SConscript (8335:9228e00459d4) | SConscript (8584:26ece1659229) |
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1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 75 unchanged lines hidden (view full) --- 84 85env.Append(SCANNERS = isa_scanner) 86 87# 88# Now create a Builder object that uses isa_parser.py to generate C++ 89# output from the ISA description (*.isa) files. 90# 91 | 1# -*- mode:python -*- 2 3# Copyright (c) 2006 The Regents of The University of Michigan 4# All rights reserved. 5# 6# Redistribution and use in source and binary forms, with or without 7# modification, are permitted provided that the following conditions are 8# met: redistributions of source code must retain the above copyright --- 75 unchanged lines hidden (view full) --- 84 85env.Append(SCANNERS = isa_scanner) 86 87# 88# Now create a Builder object that uses isa_parser.py to generate C++ 89# output from the ISA description (*.isa) files. 90# 91 |
92isa_parser = File('isa_parser.py') 93 |
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92# The emitter patches up the sources & targets to include the 93# autogenerated files as targets and isa parser itself as a source. 94def isa_desc_emitter(target, source, env): 95 cpu_models = list(env['CPU_MODELS']) 96 if env['USE_CHECKER']: 97 cpu_models.append('CheckerCPU') 98 99 # Several files are generated from the ISA description. 100 # We always get the basic decoder and header file. 101 target = [ 'decoder.cc', 'decoder.hh', 'max_inst_regs.hh' ] 102 # We also get an execute file for each selected CPU model. 103 target += [CpuModel.dict[cpu].filename for cpu in cpu_models] 104 | 94# The emitter patches up the sources & targets to include the 95# autogenerated files as targets and isa parser itself as a source. 96def isa_desc_emitter(target, source, env): 97 cpu_models = list(env['CPU_MODELS']) 98 if env['USE_CHECKER']: 99 cpu_models.append('CheckerCPU') 100 101 # Several files are generated from the ISA description. 102 # We always get the basic decoder and header file. 103 target = [ 'decoder.cc', 'decoder.hh', 'max_inst_regs.hh' ] 104 # We also get an execute file for each selected CPU model. 105 target += [CpuModel.dict[cpu].filename for cpu in cpu_models] 106 |
105 return target, source + [ Value(m) for m in cpu_models ] | 107 # List the isa parser as a source. 108 source += [ isa_parser ] 109 # Add in the CPU models. 110 source += [ Value(m) for m in cpu_models ] |
106 | 111 |
112 return target, source 113 |
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107ARCH_DIR = Dir('.') 108 109# import ply here because SCons screws with sys.path when performing actions. 110import ply 111 112def isa_desc_action_func(target, source, env): 113 # Add the current directory to the system path so we can import files 114 sys.path[0:0] = [ ARCH_DIR.srcnode().abspath ] 115 import isa_parser 116 | 114ARCH_DIR = Dir('.') 115 116# import ply here because SCons screws with sys.path when performing actions. 117import ply 118 119def isa_desc_action_func(target, source, env): 120 # Add the current directory to the system path so we can import files 121 sys.path[0:0] = [ ARCH_DIR.srcnode().abspath ] 122 import isa_parser 123 |
117 models = [ s.get_contents() for s in source[1:] ] | 124 models = [ s.get_contents() for s in source[2:] ] |
118 cpu_models = [CpuModel.dict[cpu] for cpu in models] 119 parser = isa_parser.ISAParser(target[0].dir.abspath, cpu_models) 120 parser.parse_isa_desc(source[0].abspath) 121isa_desc_action = MakeAction(isa_desc_action_func, Transform("ISA DESC", 1)) 122 123# Also include the CheckerCPU as one of the models if it is being 124# enabled via command line. 125isa_desc_builder = Builder(action=isa_desc_action, emitter=isa_desc_emitter) 126 127env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder }) 128 129DebugFlag('IntRegs') 130DebugFlag('FloatRegs') 131DebugFlag('MiscRegs') 132CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'MiscRegs' ]) | 125 cpu_models = [CpuModel.dict[cpu] for cpu in models] 126 parser = isa_parser.ISAParser(target[0].dir.abspath, cpu_models) 127 parser.parse_isa_desc(source[0].abspath) 128isa_desc_action = MakeAction(isa_desc_action_func, Transform("ISA DESC", 1)) 129 130# Also include the CheckerCPU as one of the models if it is being 131# enabled via command line. 132isa_desc_builder = Builder(action=isa_desc_action, emitter=isa_desc_emitter) 133 134env.Append(BUILDERS = { 'ISADesc' : isa_desc_builder }) 135 136DebugFlag('IntRegs') 137DebugFlag('FloatRegs') 138DebugFlag('MiscRegs') 139CompoundFlag('Registers', [ 'IntRegs', 'FloatRegs', 'MiscRegs' ]) |