SConscript (2797:b5f26b4eacef) SConscript (2811:9da12e9830ce)
1# -*- mode:python -*-
2
3# Copyright (c) 2004-2005 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 48 unchanged lines hidden (view full) ---

57 base/intmath.cc
58 base/match.cc
59 base/misc.cc
60 base/output.cc
61 base/pollevent.cc
62 base/range.cc
63 base/random.cc
64 base/sat_counter.cc
1# -*- mode:python -*-
2
3# Copyright (c) 2004-2005 The Regents of The University of Michigan
4# All rights reserved.
5#
6# Redistribution and use in source and binary forms, with or without
7# modification, are permitted provided that the following conditions are
8# met: redistributions of source code must retain the above copyright

--- 48 unchanged lines hidden (view full) ---

57 base/intmath.cc
58 base/match.cc
59 base/misc.cc
60 base/output.cc
61 base/pollevent.cc
62 base/range.cc
63 base/random.cc
64 base/sat_counter.cc
65 base/serializer.cc
65 base/socket.cc
66 base/statistics.cc
67 base/str.cc
68 base/time.cc
69 base/trace.cc
70 base/traceflags.cc
71 base/userinfo.cc
72 base/compression/lzss_compression.cc

--- 22 unchanged lines hidden (view full) ---

95
96 mem/bridge.cc
97 mem/bus.cc
98 mem/mem_object.cc
99 mem/packet.cc
100 mem/physical.cc
101 mem/port.cc
102
66 base/socket.cc
67 base/statistics.cc
68 base/str.cc
69 base/time.cc
70 base/trace.cc
71 base/traceflags.cc
72 base/userinfo.cc
73 base/compression/lzss_compression.cc

--- 22 unchanged lines hidden (view full) ---

96
97 mem/bridge.cc
98 mem/bus.cc
99 mem/mem_object.cc
100 mem/packet.cc
101 mem/physical.cc
102 mem/port.cc
103
104 mem/cache/base_cache.cc
105 mem/cache/cache.cc
106 mem/cache/cache_builder.cc
107 mem/cache/coherence/coherence_protocol.cc
108 mem/cache/coherence/uni_coherence.cc
109 mem/cache/miss/blocking_buffer.cc
110 mem/cache/miss/miss_queue.cc
111 mem/cache/miss/mshr.cc
112 mem/cache/miss/mshr_queue.cc
113 mem/cache/prefetch/base_prefetcher.cc
114 mem/cache/prefetch/ghb_prefetcher.cc
115 mem/cache/prefetch/prefetcher.cc
116 mem/cache/prefetch/stride_prefetcher.cc
117 mem/cache/prefetch/tagged_prefetcher.cc
118 mem/cache/tags/base_tags.cc
119 mem/cache/tags/cache_tags.cc
120 mem/cache/tags/fa_lru.cc
121 mem/cache/tags/iic/cc
122 mem/cache/tags/lru.cc
123 mem/cache/tags/repl/gen.cc
124 mem/cache/tags/repl/repl.cc
125 mem/cache/tags/split.cc
126 mem/cache/tags/split_lifo.cc
127 mem/cache/tags/split_lru.cc
128
103 sim/builder.cc
104 sim/debug.cc
105 sim/eventq.cc
106 sim/faults.cc
107 sim/main.cc
108 python/swig/cc_main_wrap.cc
109 sim/param.cc
110 sim/root.cc

--- 283 unchanged lines hidden --- 		129 sim/builder.cc
130 sim/debug.cc
131 sim/eventq.cc
132 sim/faults.cc
133 sim/main.cc
134 python/swig/cc_main_wrap.cc
135 sim/param.cc
136 sim/root.cc

--- 283 unchanged lines hidden ---