ExtSlave.cc (11158:a84eecaaa866) ExtSlave.cc (11254:2c263c3426fa)
1// Copyright (c) 2015 ARM Limited
2// All rights reserved.
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license

--- 78 unchanged lines hidden (view full) ---

87void
88ExtSlave::recvFunctional(PacketPtr pkt)
89{
90 if (simPhase == CONSTRUCTION) {
91 if (initPackets == NULL) {
92 initPackets = new std::list<MemEvent*>;
93 }
94 ::MemCmd::Command pktCmd = (::MemCmd::Command)pkt->cmd.toInt();
1// Copyright (c) 2015 ARM Limited
2// All rights reserved.
3//
4// The license below extends only to copyright in the software and shall
5// not be construed as granting a license to any other intellectual
6// property including but not limited to intellectual property relating
7// to a hardware implementation of the functionality of the software
8// licensed hereunder. You may use the software subject to the license

--- 78 unchanged lines hidden (view full) ---

87void
88ExtSlave::recvFunctional(PacketPtr pkt)
89{
90 if (simPhase == CONSTRUCTION) {
91 if (initPackets == NULL) {
92 initPackets = new std::list<MemEvent*>;
93 }
94 ::MemCmd::Command pktCmd = (::MemCmd::Command)pkt->cmd.toInt();
95 assert(pktCmd == ::MemCmd::WriteReq || pktCmd == ::MemCmd::Writeback);
95 assert(pktCmd == ::MemCmd::WriteReq);
96 Addr a = pkt->getAddr();
97 MemEvent* ev = new MemEvent(comp, a, a, GetX);
98 ev->setPayload(pkt->getSize(), pkt->getPtr<uint8_t>());
99 initPackets->push_back(ev);
100 } else {
101 panic("Functional accesses not allowed after construction phase");
102 }
103}

--- 17 unchanged lines hidden (view full) ---

121
122 auto ev = new MemEvent(comp, pkt->getAddr(), pkt->getAddr(), cmd);
123 ev->setPayload(pkt->getSize(), pkt->getPtr<uint8_t>());
124 if ((::MemCmd::Command)pkt->cmd.toInt() == ::MemCmd::LoadLockedReq)
125 ev->setLoadLink();
126 else if ((::MemCmd::Command)pkt->cmd.toInt() == ::MemCmd::StoreCondReq)
127 ev->setStoreConditional();
128
96 Addr a = pkt->getAddr();
97 MemEvent* ev = new MemEvent(comp, a, a, GetX);
98 ev->setPayload(pkt->getSize(), pkt->getPtr<uint8_t>());
99 initPackets->push_back(ev);
100 } else {
101 panic("Functional accesses not allowed after construction phase");
102 }
103}

--- 17 unchanged lines hidden (view full) ---

121
122 auto ev = new MemEvent(comp, pkt->getAddr(), pkt->getAddr(), cmd);
123 ev->setPayload(pkt->getSize(), pkt->getPtr<uint8_t>());
124 if ((::MemCmd::Command)pkt->cmd.toInt() == ::MemCmd::LoadLockedReq)
125 ev->setLoadLink();
126 else if ((::MemCmd::Command)pkt->cmd.toInt() == ::MemCmd::StoreCondReq)
127 ev->setStoreConditional();
128
129 if (pkt->req->isLockedRMW()) ev->setFlag(MemEvent::F_LOCKED);
129 if (pkt->req->isLockedRMW()) ev->setFlag(MemEvent::F_LOCKED);
130 if (pkt->req->isUncacheable()) ev->setFlag(MemEvent::F_NONCACHEABLE);
131 if (pkt->req->hasContextId()) ev->setGroupId(pkt->req->contextId());
132// Prefetches not working with SST; it maybe be dropping them, treating them
133// as not deserving of responses, or something else -- not sure yet.
134// ev->setPrefetchFlag(pkt->req->isPrefetch());
135
136 if (simPhase == INIT) {
137 link->sendInitData(ev);

--- 66 unchanged lines hidden --- 		130 if (pkt->req->isUncacheable()) ev->setFlag(MemEvent::F_NONCACHEABLE);
131 if (pkt->req->hasContextId()) ev->setGroupId(pkt->req->contextId());
132// Prefetches not working with SST; it maybe be dropping them, treating them
133// as not deserving of responses, or something else -- not sure yet.
134// ev->setPrefetchFlag(pkt->req->isPrefetch());
135
136 if (simPhase == INIT) {
137 link->sendInitData(ev);

--- 66 unchanged lines hidden ---