1/*****************************************************************************
2 * McPAT
3 * SOFTWARE LICENSE AGREEMENT
4 * Copyright 2012 Hewlett-Packard Development Company, L.P.
5 * All Rights Reserved
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are
9 * met: redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer;
11 * redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the

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20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.”
29 *
30 ***************************************************************************/
31#ifndef LOGIC_H_
32#define LOGIC_H_
33
34#include <cassert>
35#include <cmath>
36#include <cstring>
37#include <iostream>
38
39#include "XML_Parse.h"
40#include "arch_const.h"
41#include "basic_circuit.h"
42#include "basic_components.h"
43#include "cacti_interface.h"
44#include "component.h"
45#include "const.h"
46#include "decoder.h"
47#include "parameter.h"
48#include "xmlParser.h"
49
50using namespace std;
51
52class selection_logic : public Component{
53public:
54 selection_logic(bool _is_default, int win_entries_,
55 int issue_width_, const InputParameter *configure_interface,
56 enum Device_ty device_ty_=Core_device,
57 enum Core_type core_ty_=Inorder);//, const ParseXML *_XML_interface);
58 bool is_default;
59 InputParameter l_ip;
60 uca_org_t local_result;
61 const ParseXML *XML_interface;
62 int win_entries;
63 int issue_width;
64 int num_threads;
65 enum Device_ty device_ty;
66 enum Core_type core_ty;
67
68 void selection_power();
69 void leakage_feedback(double temperature); // TODO
70};
71
72class dep_resource_conflict_check : public Component{
73public:
74 dep_resource_conflict_check(const InputParameter *configure_interface, const CoreDynParam & dyn_p_, int compare_bits_, bool _is_default=true);
75 InputParameter l_ip;
76 uca_org_t local_result;
77 double WNORn, WNORp, Wevalinvp, Wevalinvn, Wcompn, Wcompp, Wcomppreequ;
78 CoreDynParam coredynp;
79 int compare_bits;
80 bool is_default;
81 statsDef tdp_stats;
82 statsDef rtp_stats;
83 statsDef stats_t;
84 powerDef power_t;
85
86 void conflict_check_power();
87 double compare_cap();
88 ~dep_resource_conflict_check(){
89 local_result.cleanup();
90 }
91
92 void leakage_feedback(double temperature);
93};
94
95class inst_decoder: public Component{
96public:
97 inst_decoder(bool _is_default, const InputParameter *configure_interface,
98 int opcode_length_,
99 int num_decoders_,
100 bool x86_,
101 enum Device_ty device_ty_=Core_device,
102 enum Core_type core_ty_=Inorder);
103 inst_decoder();
104 bool is_default;
105 int opcode_length;
106 int num_decoders;
107 bool x86;
108 int num_decoder_segments;
109 int num_decoded_signals;
110 InputParameter l_ip;
111 uca_org_t local_result;
112 enum Device_ty device_ty;
113 enum Core_type core_ty;
114
115 Decoder * final_dec;
116 Predec * pre_dec;
117
118 statsDef tdp_stats;
119 statsDef rtp_stats;
120 statsDef stats_t;
121 powerDef power_t;
122 void inst_decoder_delay_power();
123 ~inst_decoder();
124 void leakage_feedback(double temperature);
125};
126
127class DFFCell : public Component {
128public:
129 DFFCell(bool _is_dram, double _WdecNANDn, double _WdecNANDp,double _cell_load,
130 const InputParameter *configure_interface);
131 InputParameter l_ip;
132 bool is_dram;
133 double cell_load;
134 double WdecNANDn;
135 double WdecNANDp;
136 double clock_cap;
137 int model;
138 int n_switch;
139 int n_keep_1;
140 int n_keep_0;
141 int n_clock;
142 powerDef e_switch;
143 powerDef e_keep_1;
144 powerDef e_keep_0;
145 powerDef e_clock;
146
147 double fpfp_node_cap(unsigned int fan_in, unsigned int fan_out);
148 void compute_DFF_cell(void);
149 };
150
151class Pipeline : public Component{
152public:
153 Pipeline(const InputParameter *configure_interface, const CoreDynParam & dyn_p_, enum Device_ty device_ty_=Core_device, bool _is_core_pipeline=true, bool _is_default=true);
154 InputParameter l_ip;
155 uca_org_t local_result;
156 CoreDynParam coredynp;
157 enum Device_ty device_ty;
158 bool is_core_pipeline, is_default;
159 double num_piperegs;
160// int pipeline_stages;
161// int tot_stage_vector, per_stage_vector;
162 bool process_ind;
163 double WNANDn ;
164 double WNANDp;
165 double load_per_pipeline_stage;
166// int Hthread, num_thread, fetchWidth, decodeWidth, issueWidth, commitWidth, instruction_length;
167// int PC_width, opcode_length, num_arch_reg_tag, data_width,num_phsical_reg_tag, address_width;
168// bool thread_clock_gated;
169// bool in_order, multithreaded;
170 void compute_stage_vector();
171 void compute();
172 ~Pipeline(){
173 local_result.cleanup();
174 };
175
176};
177
178//class core_pipeline :public pipeline{
179//public:
180// int Hthread, num_thread, fetchWidth, decodeWidth, issueWidth, commitWidth, instruction_length;
181// int PC_width, opcode_length, num_arch_reg_tag, data_width,num_phsical_reg_tag, address_width;
182// bool thread_clock_gated;
183// bool in_order, multithreaded;
184// core_pipeline(bool _is_default, const InputParameter *configure_interface);
185// virtual void compute_stage_vector();
186//
187//};
188
189class FunctionalUnit :public Component{
190public:
191 ParseXML *XML;
192 int ithCore;
193 InputParameter interface_ip;
194 CoreDynParam coredynp;
195 double FU_height;
196 double clockRate,executionTime;
197 double num_fu;
198 double energy, base_energy,per_access_energy, leakage, gate_leakage;
199 bool is_default;
200 enum FU_type fu_type;
201 statsDef tdp_stats;
202 statsDef rtp_stats;
203 statsDef stats_t;
204 powerDef power_t;
205
206 FunctionalUnit(ParseXML *XML_interface, int ithCore_, InputParameter* interface_ip_,const CoreDynParam & dyn_p_, enum FU_type fu_type);
207 void computeEnergy(bool is_tdp=true);
208 void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
209 void leakage_feedback(double temperature);
210
211};
212
213class UndiffCore :public Component{
214public:
215 UndiffCore(ParseXML* XML_interface, int ithCore_, InputParameter* interface_ip_, const CoreDynParam & dyn_p_, bool exist_=true, bool embedded_=false);
216 ParseXML *XML;
217 int ithCore;
218 InputParameter interface_ip;
219 CoreDynParam coredynp;
220 double clockRate,executionTime;
221 double scktRatio, chip_PR_overhead, macro_PR_overhead;
222 enum Core_type core_ty;
223 bool opt_performance, embedded;
224 double pipeline_stage,num_hthreads,issue_width;
225 bool is_default;
226
227 void displayEnergy(uint32_t indent = 0,int plevel = 100, bool is_tdp=true);
228 ~UndiffCore(){};
229 bool exist;
230
231
232};
233#endif /* LOGIC_H_ */