4a5
> * Copyright (c) 2010-2013 Advanced Micro Devices, Inc.
28c29
< * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.”
---
> * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45,46c46,49
< // leakge power includes entire htree in a bank (when uca_tree == false)
< // leakge power includes only part to one bank when uca_tree == true
---
> class InterconnectParameters {
> public:
> double active_ports;
> };
48,63c51,55
< class interconnect : public Component
< {
< public:
< interconnect(
< string name_,
< enum Device_ty device_ty_,
< double base_w, double base_h, int data_w, double len,
< const InputParameter *configure_interface, int start_wiring_level_,
< bool pipelinable_ = false,
< double route_over_perc_ =0.5,
< bool opt_local_=true,
< enum Core_type core_ty_=Inorder,
< enum Wire_type wire_model=Global,
< double width_s=1.0, double space_s=1.0,
< TechnologyParameter::DeviceType *dt = &(g_tp.peri_global)
< );
---
> class InterconnectStatistics {
> public:
> double duty_cycle;
> double accesses;
> };
65c57,59
< ~interconnect() {};
---
> class Interconnect : public McPATComponent {
> public:
> static double width_scaling_threshold;
67,69c61
< void compute();
< string name;
< enum Device_ty device_ty;
---
> enum Device_ty device_ty;
71,72c63,64
< InputParameter l_ip;
< uca_org_t local_result;
---
> InputParameter l_ip;
> uca_org_t local_result;
74,79d65
< void set_in_rise_time(double rt)
< {
< in_rise_time = rt;
< }
<
< void leakage_feedback(double temperature);
84c70
< double init_wire_bw; // bus width at root
---
> double init_wire_bw;
95,98c81,84
< bool latency_overflow;
< bool throughput_overflow;
< double interconnect_latency;
< double interconnect_throughput;
---
> bool latency_overflow;
> bool throughput_overflow;
> double interconnect_latency;
> double interconnect_throughput;
103c89,92
< int num_pipe_stages;
---
> int num_pipe_stages;
> TechnologyParameter::DeviceType* deviceType;
> InterconnectParameters int_params;
> InterconnectStatistics int_stats;
105,107c94,113
< private:
< TechnologyParameter::DeviceType *deviceType;
<
---
> Interconnect(XMLNode* _xml_data, string name_,
> enum Device_ty device_ty_, double base_w,
> double base_h, int data_w, double len,
> const InputParameter *configure_interface,
> int start_wiring_level_,
> double _clockRate = 0.0f,
> bool pipelinable_ = false, double route_over_perc_ = 0.5,
> bool opt_local_ = true, enum Core_type core_ty_ = Inorder,
> enum Wire_type wire_model = Global, double width_s = 1.0,
> double space_s = 1.0,
> TechnologyParameter::DeviceType *dt = &(g_tp.peri_global));
> private:
> void calcWireData();
> public:
> void computeArea();
> void computeEnergy();
> void set_params_stats(double active_ports,
> double duty_cycle, double accesses);
> void leakage_feedback(double temperature);
> ~Interconnect() {};