1/*****************************************************************************
2 * McPAT/CACTI
3 * SOFTWARE LICENSE AGREEMENT
4 * Copyright 2012 Hewlett-Packard Development Company, L.P.
| 1/*****************************************************************************
2 * McPAT/CACTI
3 * SOFTWARE LICENSE AGREEMENT
4 * Copyright 2012 Hewlett-Packard Development Company, L.P.
|
| 5 * Copyright (c) 2010-2013 Advanced Micro Devices, Inc.
|
5 * All Rights Reserved
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are
9 * met: redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer;
11 * redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution;
14 * neither the name of the copyright holders nor the names of its
15 * contributors may be used to endorse or promote products derived from
16 * this software without specific prior written permission.
17
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
| 6 * All Rights Reserved
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are
10 * met: redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer;
12 * redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution;
15 * neither the name of the copyright holders nor the names of its
16 * contributors may be used to endorse or promote products derived from
17 * this software without specific prior written permission.
18
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
22 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
23 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
25 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.”
| 29 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
29 *
30 ***************************************************************************/
31
32
33
34#ifndef __UCA_H__
35#define __UCA_H__
36
37#include "area.h"
38#include "bank.h"
39#include "component.h"
40#include "htree2.h"
41#include "parameter.h"
42
| 30 *
31 ***************************************************************************/
32
33
34
35#ifndef __UCA_H__
36#define __UCA_H__
37
38#include "area.h"
39#include "bank.h"
40#include "component.h"
41#include "htree2.h"
42#include "parameter.h"
43
|
43class UCA : public Component
44{
45 public:
| 44class UCA : public Component {
45public:
|
46 UCA(const DynamicParameter & dyn_p);
47 ~UCA();
48 double compute_delays(double inrisetime); // returns outrisetime
49 void compute_power_energy();
50
51 DynamicParameter dp;
52 Bank bank;
53
54 Htree2 * htree_in_add;
55 Htree2 * htree_in_data;
56 Htree2 * htree_out_data;
57 Htree2 * htree_in_search;
58 Htree2 * htree_out_search;
59
60 powerDef power_routing_to_bank;
61
62 uint32_t nbanks;
63
64 int num_addr_b_bank;
65 int num_di_b_bank;
66 int num_do_b_bank;
67 int num_si_b_bank;
68 int num_so_b_bank;
| 46 UCA(const DynamicParameter & dyn_p);
47 ~UCA();
48 double compute_delays(double inrisetime); // returns outrisetime
49 void compute_power_energy();
50
51 DynamicParameter dp;
52 Bank bank;
53
54 Htree2 * htree_in_add;
55 Htree2 * htree_in_data;
56 Htree2 * htree_out_data;
57 Htree2 * htree_in_search;
58 Htree2 * htree_out_search;
59
60 powerDef power_routing_to_bank;
61
62 uint32_t nbanks;
63
64 int num_addr_b_bank;
65 int num_di_b_bank;
66 int num_do_b_bank;
67 int num_si_b_bank;
68 int num_so_b_bank;
|
69 int RWP, ERP, EWP,SCHP;
| 69 int RWP;
70 int ERP;
71 int EWP;
72 int SCHP;
|
70 double area_all_dataramcells;
71
72 double dyn_read_energy_from_closed_page;
73 double dyn_read_energy_from_open_page;
74 double dyn_read_energy_remaining_words_in_burst;
75
76 double refresh_power; // only for DRAM
77 double activate_energy;
78 double read_energy;
79 double write_energy;
80 double precharge_energy;
81 double leak_power_subbank_closed_page;
82 double leak_power_subbank_open_page;
83 double leak_power_request_and_reply_networks;
84
85 double delay_array_to_sa_mux_lev_1_decoder;
86 double delay_array_to_sa_mux_lev_2_decoder;
87 double delay_before_subarray_output_driver;
88 double delay_from_subarray_out_drv_to_out;
89 double access_time;
90 double precharge_delay;
91 double multisubbank_interleave_cycle_time;
92};
93
94#endif
95
| 73 double area_all_dataramcells;
74
75 double dyn_read_energy_from_closed_page;
76 double dyn_read_energy_from_open_page;
77 double dyn_read_energy_remaining_words_in_burst;
78
79 double refresh_power; // only for DRAM
80 double activate_energy;
81 double read_energy;
82 double write_energy;
83 double precharge_energy;
84 double leak_power_subbank_closed_page;
85 double leak_power_subbank_open_page;
86 double leak_power_request_and_reply_networks;
87
88 double delay_array_to_sa_mux_lev_1_decoder;
89 double delay_array_to_sa_mux_lev_2_decoder;
90 double delay_before_subarray_output_driver;
91 double delay_from_subarray_out_drv_to_out;
92 double access_time;
93 double precharge_delay;
94 double multisubbank_interleave_cycle_time;
95};
96
97#endif
98
|