basic_circuit.h (10152:52c552138ba1) basic_circuit.h (10234:5cb711fa6176)
1/*****************************************************************************
2 * McPAT/CACTI
3 * SOFTWARE LICENSE AGREEMENT
4 * Copyright 2012 Hewlett-Packard Development Company, L.P.
1/*****************************************************************************
2 * McPAT/CACTI
3 * SOFTWARE LICENSE AGREEMENT
4 * Copyright 2012 Hewlett-Packard Development Company, L.P.
5 * Copyright (c) 2010-2013 Advanced Micro Devices, Inc.
5 * All Rights Reserved
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are
9 * met: redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer;
11 * redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution;
14 * neither the name of the copyright holders nor the names of its
15 * contributors may be used to endorse or promote products derived from
16 * this software without specific prior written permission.
17
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
6 * All Rights Reserved
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are
10 * met: redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer;
12 * redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution;
15 * neither the name of the copyright holders nor the names of its
16 * contributors may be used to endorse or promote products derived from
17 * this software without specific prior written permission.
18
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
21 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
22 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
23 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
25 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 *
30 ***************************************************************************/
31
32
33
34#ifndef __BASIC_CIRCUIT_H__
35#define __BASIC_CIRCUIT_H__
36
37#include "cacti_interface.h"
38#include "const.h"
39
40using namespace std;
41
42#define UNI_LEAK_STACK_FACTOR 0.43
43
44int powers (int base, int n);
45bool is_pow2(int64_t val);
46uint32_t _log2(uint64_t num);
47int factorial(int n, int m = 1);
48int combination(int n, int m);
49
50//#define DBG
51#ifdef DBG
30 *
31 ***************************************************************************/
32
33
34
35#ifndef __BASIC_CIRCUIT_H__
36#define __BASIC_CIRCUIT_H__
37
38#include "cacti_interface.h"
39#include "const.h"
40
41using namespace std;
42
43#define UNI_LEAK_STACK_FACTOR 0.43
44
45int powers (int base, int n);
46bool is_pow2(int64_t val);
47uint32_t _log2(uint64_t num);
48int factorial(int n, int m = 1);
49int combination(int n, int m);
50
51//#define DBG
52#ifdef DBG
52 #define PRINTDW(a);\
53#define PRINTDW(a);\
53 a;
54#else
54 a;
55#else
55 #define PRINTDW(a);\
56#define PRINTDW(a);\
56
57#endif
58
59
60enum Wire_placement {
61 outside_mat,
62 inside_mat,
63 local_wires
64};
65
66
67
68enum Htree_type {
69 Add_htree,
70 Data_in_htree,
71 Data_out_htree,
72 Search_in_htree,
73 Search_out_htree,
74};
75
76enum Gate_type {
77 nmos,
78 pmos,
57
58#endif
59
60
61enum Wire_placement {
62 outside_mat,
63 inside_mat,
64 local_wires
65};
66
67
68
69enum Htree_type {
70 Add_htree,
71 Data_in_htree,
72 Data_out_htree,
73 Search_in_htree,
74 Search_out_htree,
75};
76
77enum Gate_type {
78 nmos,
79 pmos,
79 inv,
80 inv,
80 nand,
81 nor,
82 tri,
83 tg
84};
85
86enum Half_net_topology {
87 parallel,
88 series
89};
90
91double logtwo (double x);
92
93double gate_C(
94 double width,
95 double wirelength,
96 bool _is_dram = false,
97 bool _is_sram = false,
98 bool _is_wl_tr = false);
99
100double gate_C_pass(
101 double width,
102 double wirelength,
103 bool _is_dram = false,
104 bool _is_sram = false,
105 bool _is_wl_tr = false);
106
107double drain_C_(
108 double width,
109 int nchannel,
110 int stack,
111 int next_arg_thresh_folding_width_or_height_cell,
112 double fold_dimension,
113 bool _is_dram = false,
114 bool _is_sram = false,
115 bool _is_wl_tr = false);
116
117double tr_R_on(
118 double width,
119 int nchannel,
120 int stack,
121 bool _is_dram = false,
122 bool _is_sram = false,
123 bool _is_wl_tr = false);
124
125double R_to_w(
126 double res,
127 int nchannel,
128 bool _is_dram = false,
129 bool _is_sram = false,
130 bool _is_wl_tr = false);
131
132double horowitz (
133 double inputramptime,
134 double tf,
135 double vs1,
136 double vs2,
137 int rise);
138
139double pmos_to_nmos_sz_ratio(
140 bool _is_dram = false,
141 bool _is_wl_tr = false);
142
143double simplified_nmos_leakage(
144 double nwidth,
145 bool _is_dram = false,
146 bool _is_cell = false,
147 bool _is_wl_tr = false);
148
149double simplified_pmos_leakage(
150 double pwidth,
151 bool _is_dram = false,
152 bool _is_cell = false,
153 bool _is_wl_tr = false);
154
155
156double cmos_Ileak(
157 double nWidth,
158 double pWidth,
159 bool _is_dram = false,
160 bool _is_cell = false,
161 bool _is_wl_tr = false);
162
163double cmos_Ig_n(
164 double nWidth,
165 bool _is_dram = false,
166 bool _is_cell = false,
81 nand,
82 nor,
83 tri,
84 tg
85};
86
87enum Half_net_topology {
88 parallel,
89 series
90};
91
92double logtwo (double x);
93
94double gate_C(
95 double width,
96 double wirelength,
97 bool _is_dram = false,
98 bool _is_sram = false,
99 bool _is_wl_tr = false);
100
101double gate_C_pass(
102 double width,
103 double wirelength,
104 bool _is_dram = false,
105 bool _is_sram = false,
106 bool _is_wl_tr = false);
107
108double drain_C_(
109 double width,
110 int nchannel,
111 int stack,
112 int next_arg_thresh_folding_width_or_height_cell,
113 double fold_dimension,
114 bool _is_dram = false,
115 bool _is_sram = false,
116 bool _is_wl_tr = false);
117
118double tr_R_on(
119 double width,
120 int nchannel,
121 int stack,
122 bool _is_dram = false,
123 bool _is_sram = false,
124 bool _is_wl_tr = false);
125
126double R_to_w(
127 double res,
128 int nchannel,
129 bool _is_dram = false,
130 bool _is_sram = false,
131 bool _is_wl_tr = false);
132
133double horowitz (
134 double inputramptime,
135 double tf,
136 double vs1,
137 double vs2,
138 int rise);
139
140double pmos_to_nmos_sz_ratio(
141 bool _is_dram = false,
142 bool _is_wl_tr = false);
143
144double simplified_nmos_leakage(
145 double nwidth,
146 bool _is_dram = false,
147 bool _is_cell = false,
148 bool _is_wl_tr = false);
149
150double simplified_pmos_leakage(
151 double pwidth,
152 bool _is_dram = false,
153 bool _is_cell = false,
154 bool _is_wl_tr = false);
155
156
157double cmos_Ileak(
158 double nWidth,
159 double pWidth,
160 bool _is_dram = false,
161 bool _is_cell = false,
162 bool _is_wl_tr = false);
163
164double cmos_Ig_n(
165 double nWidth,
166 bool _is_dram = false,
167 bool _is_cell = false,
167 bool _is_wl_tr= false);
168 bool _is_wl_tr = false);
168
169double cmos_Ig_p(
170 double pWidth,
171 bool _is_dram = false,
172 bool _is_cell = false,
169
170double cmos_Ig_p(
171 double pWidth,
172 bool _is_dram = false,
173 bool _is_cell = false,
173 bool _is_wl_tr= false);
174 bool _is_wl_tr = false);
174
175
176double cmos_Isub_leakage(
177 double nWidth,
178 double pWidth,
179 int fanin,
180 enum Gate_type g_type,
181 bool _is_dram = false,
182 bool _is_cell = false,
183 bool _is_wl_tr = false,
184 enum Half_net_topology topo = series);
185
186double cmos_Ig_leakage(
187 double nWidth,
188 double pWidth,
189 int fanin,
190 enum Gate_type g_type,
191 bool _is_dram = false,
192 bool _is_cell = false,
193 bool _is_wl_tr = false,
194 enum Half_net_topology topo = series);
195
196double shortcircuit(
197 double vt,
198 double velocity_index,
199 double c_in,
200 double c_out,
201 double w_nmos,
202 double w_pmos,
203 double i_on_n,
204 double i_on_p,
205 double i_on_n_in,
206 double i_on_p_in,
207 double vdd);
208
209double shortcircuit_simple(
210 double vt,
211 double velocity_index,
212 double c_in,
213 double c_out,
214 double w_nmos,
215 double w_pmos,
216 double i_on_n,
217 double i_on_p,
218 double i_on_n_in,
219 double i_on_p_in,
220 double vdd);
221//set power point product mask; strictly speaking this is not real point product
222inline void set_pppm(
175
176
177double cmos_Isub_leakage(
178 double nWidth,
179 double pWidth,
180 int fanin,
181 enum Gate_type g_type,
182 bool _is_dram = false,
183 bool _is_cell = false,
184 bool _is_wl_tr = false,
185 enum Half_net_topology topo = series);
186
187double cmos_Ig_leakage(
188 double nWidth,
189 double pWidth,
190 int fanin,
191 enum Gate_type g_type,
192 bool _is_dram = false,
193 bool _is_cell = false,
194 bool _is_wl_tr = false,
195 enum Half_net_topology topo = series);
196
197double shortcircuit(
198 double vt,
199 double velocity_index,
200 double c_in,
201 double c_out,
202 double w_nmos,
203 double w_pmos,
204 double i_on_n,
205 double i_on_p,
206 double i_on_n_in,
207 double i_on_p_in,
208 double vdd);
209
210double shortcircuit_simple(
211 double vt,
212 double velocity_index,
213 double c_in,
214 double c_out,
215 double w_nmos,
216 double w_pmos,
217 double i_on_n,
218 double i_on_p,
219 double i_on_n_in,
220 double i_on_p_in,
221 double vdd);
222//set power point product mask; strictly speaking this is not real point product
223inline void set_pppm(
223 double * pppv,
224 double a=1,
225 double b=1,
226 double c=1,
227 double d=1
228 ){
229 pppv[0]= a;
230 pppv[1]= b;
231 pppv[2]= c;
232 pppv[3]= d;
224 double * pppv,
225 double a = 1,
226 double b = 1,
227 double c = 1,
228 double d = 1
229) {
230 pppv[0] = a;
231 pppv[1] = b;
232 pppv[2] = c;
233 pppv[3] = d;
233
234}
235
236inline void set_sppm(
234
235}
236
237inline void set_sppm(
237 double * sppv,
238 double a=1,
239 double b=1,
240 double c=1,
241 double d=1
242 ){
243 sppv[0]= a;
244 sppv[1]= b;
245 sppv[2]= c;
238 double * sppv,
239 double a = 1,
240 double b = 1,
241 double c = 1,
242 double d = 1
243) {
244 sppv[0] = a;
245 sppv[1] = b;
246 sppv[2] = c;
246}
247
248#endif
247}
248
249#endif