1/*
2 * Copyright (c) 2012-2014, TU Delft
3 * Copyright (c) 2012-2014, TU Eindhoven
4 * Copyright (c) 2012-2014, TU Kaiserslautern
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are
9 * met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 *
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * 3. Neither the name of the copyright holder nor the names of its
19 * contributors may be used to endorse or promote products derived from
20 * this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
23 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
25 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
28 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
29 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
30 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
31 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 * Authors: Karthik Chandrasekar
35 *
36 */
37
38#include "MemPowerSpec.h"
39
40using namespace Data;
41
42MemPowerSpec::MemPowerSpec() :
43 idd0(0.0),
44 idd02(0.0),
45 idd2p0(0.0),
46 idd2p02(0.0),
47 idd2p1(0.0),
48 idd2p12(0.0),
49 idd2n(0.0),
50 idd2n2(0.0),
51 idd3p0(0.0),
52 idd3p02(0.0),
53 idd3p1(0.0),
54 idd3p12(0.0),
55 idd3n(0.0),
56 idd3n2(0.0),
57 idd4r(0.0),
58 idd4r2(0.0),
59 idd4w(0.0),
60 idd4w2(0.0),
61 idd5(0.0),
62 idd52(0.0),
| 1/*
2 * Copyright (c) 2012-2014, TU Delft
3 * Copyright (c) 2012-2014, TU Eindhoven
4 * Copyright (c) 2012-2014, TU Kaiserslautern
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are
9 * met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 *
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 *
18 * 3. Neither the name of the copyright holder nor the names of its
19 * contributors may be used to endorse or promote products derived from
20 * this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
23 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
25 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
26 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
28 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
29 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
30 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
31 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 *
34 * Authors: Karthik Chandrasekar
35 *
36 */
37
38#include "MemPowerSpec.h"
39
40using namespace Data;
41
42MemPowerSpec::MemPowerSpec() :
43 idd0(0.0),
44 idd02(0.0),
45 idd2p0(0.0),
46 idd2p02(0.0),
47 idd2p1(0.0),
48 idd2p12(0.0),
49 idd2n(0.0),
50 idd2n2(0.0),
51 idd3p0(0.0),
52 idd3p02(0.0),
53 idd3p1(0.0),
54 idd3p12(0.0),
55 idd3n(0.0),
56 idd3n2(0.0),
57 idd4r(0.0),
58 idd4r2(0.0),
59 idd4w(0.0),
60 idd4w2(0.0),
61 idd5(0.0),
62 idd52(0.0),
|
| 63 idd5B(0.0),
|
63 idd6(0.0),
64 idd62(0.0),
65 vdd(0.0),
66 vdd2(0.0),
67 capacitance(0.0),
68 ioPower(0.0),
69 wrOdtPower(0.0),
70 termRdPower(0.0),
71 termWrPower(0.0)
72{
73}
74
75void MemPowerSpec::processParameters()
76{
77 idd0 = getParamValWithDefault("idd0", 0.0);
78 idd02 = getParamValWithDefault("idd02", 0.0);
79 idd2p0 = getParamValWithDefault("idd2p0", 0.0);
80 idd2p02 = getParamValWithDefault("idd2p02", 0.0);
81 idd2p1 = getParamValWithDefault("idd2p1", 0.0);
82 idd2p12 = getParamValWithDefault("idd2p12", 0.0);
83 idd2n = getParamValWithDefault("idd2n", 0.0);
84 idd2n2 = getParamValWithDefault("idd2n2", 0.0);
85 idd3p0 = getParamValWithDefault("idd3p0", 0.0);
86 idd3p02 = getParamValWithDefault("idd3p02", 0.0);
87 idd3p1 = getParamValWithDefault("idd3p1", 0.0);
88 idd3p12 = getParamValWithDefault("idd3p12", 0.0);
89 idd3n = getParamValWithDefault("idd3n", 0.0);
90 idd3n2 = getParamValWithDefault("idd3n2", 0.0);
91 idd4r = getParamValWithDefault("idd4r", 0.0);
92 idd4r2 = getParamValWithDefault("idd4r2", 0.0);
93 idd4w = getParamValWithDefault("idd4w", 0.0);
94 idd4w2 = getParamValWithDefault("idd4w2", 0.0);
95 idd5 = getParamValWithDefault("idd5", 0.0);
96 idd52 = getParamValWithDefault("idd52", 0.0);
| 64 idd6(0.0),
65 idd62(0.0),
66 vdd(0.0),
67 vdd2(0.0),
68 capacitance(0.0),
69 ioPower(0.0),
70 wrOdtPower(0.0),
71 termRdPower(0.0),
72 termWrPower(0.0)
73{
74}
75
76void MemPowerSpec::processParameters()
77{
78 idd0 = getParamValWithDefault("idd0", 0.0);
79 idd02 = getParamValWithDefault("idd02", 0.0);
80 idd2p0 = getParamValWithDefault("idd2p0", 0.0);
81 idd2p02 = getParamValWithDefault("idd2p02", 0.0);
82 idd2p1 = getParamValWithDefault("idd2p1", 0.0);
83 idd2p12 = getParamValWithDefault("idd2p12", 0.0);
84 idd2n = getParamValWithDefault("idd2n", 0.0);
85 idd2n2 = getParamValWithDefault("idd2n2", 0.0);
86 idd3p0 = getParamValWithDefault("idd3p0", 0.0);
87 idd3p02 = getParamValWithDefault("idd3p02", 0.0);
88 idd3p1 = getParamValWithDefault("idd3p1", 0.0);
89 idd3p12 = getParamValWithDefault("idd3p12", 0.0);
90 idd3n = getParamValWithDefault("idd3n", 0.0);
91 idd3n2 = getParamValWithDefault("idd3n2", 0.0);
92 idd4r = getParamValWithDefault("idd4r", 0.0);
93 idd4r2 = getParamValWithDefault("idd4r2", 0.0);
94 idd4w = getParamValWithDefault("idd4w", 0.0);
95 idd4w2 = getParamValWithDefault("idd4w2", 0.0);
96 idd5 = getParamValWithDefault("idd5", 0.0);
97 idd52 = getParamValWithDefault("idd52", 0.0);
|
| 98 idd5B = getParamValWithDefault("idd5B", 0.0);
|
97 idd6 = getParamValWithDefault("idd6", 0.0);
98 idd62 = getParamValWithDefault("idd62", 0.0);
99 vdd = getParamValWithDefault("vdd", 0.0);
100 vdd2 = getParamValWithDefault("vdd2", 0.0);
101
102 capacitance = getParamValWithDefault("capacitance", 0.0);
103 ioPower = getParamValWithDefault("ioPower", 0.0);
104 wrOdtPower = getParamValWithDefault("wrOdtPower", 0.0);
105 termRdPower = getParamValWithDefault("termRdPower", 0.0);
106 termWrPower = getParamValWithDefault("termWrPower", 0.0);
107} // MemPowerSpec::processParameters
| 99 idd6 = getParamValWithDefault("idd6", 0.0);
100 idd62 = getParamValWithDefault("idd62", 0.0);
101 vdd = getParamValWithDefault("vdd", 0.0);
102 vdd2 = getParamValWithDefault("vdd2", 0.0);
103
104 capacitance = getParamValWithDefault("capacitance", 0.0);
105 ioPower = getParamValWithDefault("ioPower", 0.0);
106 wrOdtPower = getParamValWithDefault("wrOdtPower", 0.0);
107 termRdPower = getParamValWithDefault("termRdPower", 0.0);
108 termWrPower = getParamValWithDefault("termWrPower", 0.0);
109} // MemPowerSpec::processParameters
|