1/* 2 * Copyright (c) 2012-2014, TU Delft 3 * Copyright (c) 2012-2014, TU Eindhoven 4 * Copyright (c) 2012-2014, TU Kaiserslautern 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are 9 * met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * 3. Neither the name of the copyright holder nor the names of its 19 * contributors may be used to endorse or promote products derived from 20 * this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS 23 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 25 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 26 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 28 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 29 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 30 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 31 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * Authors: Karthik Chandrasekar 35 * 36 */ 37 38#include "MemCommand.h" 39 40#include <algorithm> // for max 41 42#include "MemorySpecification.h" 43 44using namespace Data; 45using namespace std; 46
| 1/* 2 * Copyright (c) 2012-2014, TU Delft 3 * Copyright (c) 2012-2014, TU Eindhoven 4 * Copyright (c) 2012-2014, TU Kaiserslautern 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are 9 * met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * 3. Neither the name of the copyright holder nor the names of its 19 * contributors may be used to endorse or promote products derived from 20 * this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS 23 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 25 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 26 * HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 28 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 29 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 30 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 31 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * Authors: Karthik Chandrasekar 35 * 36 */ 37 38#include "MemCommand.h" 39 40#include <algorithm> // for max 41 42#include "MemorySpecification.h" 43 44using namespace Data; 45using namespace std; 46
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47MemCommand::MemCommand() : 48 type(MemCommand::PRE), 49 bank(0), 50 timestamp(0) 51{ 52}
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53 54MemCommand::MemCommand(MemCommand::cmds type,
| 47 48MemCommand::MemCommand(MemCommand::cmds type,
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55 unsigned bank, double timestamp) :
| 49 unsigned bank, int64_t timestamp) :
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56 type(type), 57 bank(bank), 58 timestamp(timestamp) 59{ 60} 61 62void MemCommand::setType(MemCommand::cmds _type) 63{ 64 type = _type; 65} 66 67MemCommand::cmds MemCommand::getType() const 68{ 69 return type; 70} 71 72void MemCommand::setBank(unsigned _bank) 73{ 74 bank = _bank; 75} 76 77unsigned MemCommand::getBank() const 78{ 79 return bank; 80} 81 82// For auto-precharge with read or write - to calculate cycle of precharge
| 50 type(type), 51 bank(bank), 52 timestamp(timestamp) 53{ 54} 55 56void MemCommand::setType(MemCommand::cmds _type) 57{ 58 type = _type; 59} 60 61MemCommand::cmds MemCommand::getType() const 62{ 63 return type; 64} 65 66void MemCommand::setBank(unsigned _bank) 67{ 68 bank = _bank; 69} 70 71unsigned MemCommand::getBank() const 72{ 73 return bank; 74} 75 76// For auto-precharge with read or write - to calculate cycle of precharge
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83int MemCommand::getPrechargeOffset(const MemorySpecification& memSpec,
| 77int64_t MemCommand::getPrechargeOffset(const MemorySpecification& memSpec,
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84 MemCommand::cmds type) const 85{
| 78 MemCommand::cmds type) const 79{
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86 int precharge_offset = 0;
| 80 int64_t precharge_offset = 0;
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87
| 81
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88 int BL(static_cast<int>(memSpec.memArchSpec.burstLength)); 89 int RTP(static_cast<int>(memSpec.memTimingSpec.RTP)); 90 int dataRate(static_cast<int>(memSpec.memArchSpec.dataRate)); 91 int AL(static_cast<int>(memSpec.memTimingSpec.AL)); 92 int WL(static_cast<int>(memSpec.memTimingSpec.WL)); 93 int WR(static_cast<int>(memSpec.memTimingSpec.WR)); 94 int B = BL/dataRate;
| 82 int64_t BL = memSpec.memArchSpec.burstLength; 83 int64_t RTP = memSpec.memTimingSpec.RTP; 84 int64_t dataRate = memSpec.memArchSpec.dataRate; 85 int64_t AL = memSpec.memTimingSpec.AL; 86 int64_t WL = memSpec.memTimingSpec.WL; 87 int64_t WR = memSpec.memTimingSpec.WR; 88 int64_t B = BL/dataRate;
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95 96 const MemoryType::MemoryType_t& memType = memSpec.memoryType; 97 98 // Read with auto-precharge 99 if (type == MemCommand::RDA) { 100 if (memType == MemoryType::DDR2) {
| 89 90 const MemoryType::MemoryType_t& memType = memSpec.memoryType; 91 92 // Read with auto-precharge 93 if (type == MemCommand::RDA) { 94 if (memType == MemoryType::DDR2) {
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101 precharge_offset = B + AL - 2 + max(RTP, 2);
| 95 precharge_offset = B + AL - 2 + max(RTP, int64_t(2));
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102 } else if (memType == MemoryType::DDR3) {
| 96 } else if (memType == MemoryType::DDR3) {
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103 precharge_offset = AL + max(RTP, 4);
| 97 precharge_offset = AL + max(RTP, int64_t(4));
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104 } else if (memType == MemoryType::DDR4) { 105 precharge_offset = AL + RTP; 106 } else if (memType == MemoryType::LPDDR) { 107 precharge_offset = B; 108 } else if (memType == MemoryType::LPDDR2) {
| 98 } else if (memType == MemoryType::DDR4) { 99 precharge_offset = AL + RTP; 100 } else if (memType == MemoryType::LPDDR) { 101 precharge_offset = B; 102 } else if (memType == MemoryType::LPDDR2) {
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109 precharge_offset = B + max(0, RTP - 2);
| 103 precharge_offset = B + max(int64_t(0), RTP - 2);
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110 } else if (memType == MemoryType::LPDDR3) {
| 104 } else if (memType == MemoryType::LPDDR3) {
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111 precharge_offset = B + max(0, RTP - 4);
| 105 precharge_offset = B + max(int64_t(0), RTP - 4);
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112 } else if (memType == MemoryType::WIDEIO_SDR) { 113 precharge_offset = B; 114 } 115 } else if (type == MemCommand::WRA) { // Write with auto-precharge 116 if (memType == MemoryType::DDR2) { 117 precharge_offset = B + WL + WR; 118 } else if (memType == MemoryType::DDR3) { 119 precharge_offset = B + WL + WR; 120 } else if (memType == MemoryType::DDR4) { 121 precharge_offset = B + WL + WR; 122 } else if (memType == MemoryType::LPDDR) { 123 precharge_offset = B + WR; // + DQSS actually, but we don't have that parameter. 124 } else if (memType == MemoryType::LPDDR2) { 125 precharge_offset = B + WL + WR + 1; 126 } else if (memType == MemoryType::LPDDR3) { 127 precharge_offset = B + WL + WR + 1; 128 } else if (memType == MemoryType::WIDEIO_SDR) { 129 precharge_offset = B + WL + WR - 1; 130 } 131 } 132 133 return precharge_offset; 134} // MemCommand::getPrechargeOffset 135
| 106 } else if (memType == MemoryType::WIDEIO_SDR) { 107 precharge_offset = B; 108 } 109 } else if (type == MemCommand::WRA) { // Write with auto-precharge 110 if (memType == MemoryType::DDR2) { 111 precharge_offset = B + WL + WR; 112 } else if (memType == MemoryType::DDR3) { 113 precharge_offset = B + WL + WR; 114 } else if (memType == MemoryType::DDR4) { 115 precharge_offset = B + WL + WR; 116 } else if (memType == MemoryType::LPDDR) { 117 precharge_offset = B + WR; // + DQSS actually, but we don't have that parameter. 118 } else if (memType == MemoryType::LPDDR2) { 119 precharge_offset = B + WL + WR + 1; 120 } else if (memType == MemoryType::LPDDR3) { 121 precharge_offset = B + WL + WR + 1; 122 } else if (memType == MemoryType::WIDEIO_SDR) { 123 precharge_offset = B + WL + WR - 1; 124 } 125 } 126 127 return precharge_offset; 128} // MemCommand::getPrechargeOffset 129
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136void MemCommand::setTime(double _timestamp)
| 130void MemCommand::setTime(int64_t _timestamp)
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137{ 138 timestamp = _timestamp; 139} 140
| 131{ 132 timestamp = _timestamp; 133} 134
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141double MemCommand::getTime() const
| 135int64_t MemCommand::getTimeInt64() const
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142{ 143 return timestamp; 144} 145
| 136{ 137 return timestamp; 138} 139
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146int64_t MemCommand::getTimeInt64() const 147{ 148 return static_cast<int64_t>(timestamp); 149} 150
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151MemCommand::cmds MemCommand::typeWithoutAutoPrechargeFlag() const 152{ 153 if (type == MemCommand::RDA) { 154 return MemCommand::RD; 155 } else if (type == MemCommand::WRA) { 156 return MemCommand::WR; 157 } 158 return type; 159}
| 140MemCommand::cmds MemCommand::typeWithoutAutoPrechargeFlag() const 141{ 142 if (type == MemCommand::RDA) { 143 return MemCommand::RD; 144 } else if (type == MemCommand::WRA) { 145 return MemCommand::WR; 146 } 147 return type; 148}
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