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1# DRAM Power Model (DRAMPower) 2[![Build Status](https://travis-ci.org/ravenrd/DRAMPower.svg?branch=master)](https://travis-ci.org/ravenrd/DRAMPower) 3[![Coverage Status](https://coveralls.io/repos/ravenrd/DRAMPower/badge.png?branch=master)](https://coveralls.io/r/ravenrd/DRAMPower?branch=master) 4## 0. Releases 5 6The last official release can be found here: 7https://github.com/ravenrd/DRAMPower/releases/tag/4.0 8 --- 238 unchanged lines hidden (view full) --- 247An example for the usuage of the library can be found in the folder test/libdrampowertest/lib_test.cc 248 249## 10. Authors & Acknowledgment 250 251The tool is based on the DRAM power model developed jointly by the Computer Engineering Research Group at TU Delft and the Electronic Systems Group at TU Eindhoven and verified by the Microelectronic System Design Research Group at TU Kaiserslautern with equivalent circuit-level simulations. This tool has been developed by Karthik Chandrasekar with Yonghui Li under the supervision of Dr. Benny Akesson and Prof. Kees Goossens. The IO and Termination Power measures have been employed from Micron's DRAM Power Calculator. If you decide to use DRAMPower in your research, please cite one of the following references: 252 253**To cite the DRAMPower Tool:** 254``` | 1# DRAM Power Model (DRAMPower) 2[![Build Status](https://travis-ci.org/ravenrd/DRAMPower.svg?branch=master)](https://travis-ci.org/ravenrd/DRAMPower) 3[![Coverage Status](https://coveralls.io/repos/ravenrd/DRAMPower/badge.png?branch=master)](https://coveralls.io/r/ravenrd/DRAMPower?branch=master) 4## 0. Releases 5 6The last official release can be found here: 7https://github.com/ravenrd/DRAMPower/releases/tag/4.0 8 --- 238 unchanged lines hidden (view full) --- 247An example for the usuage of the library can be found in the folder test/libdrampowertest/lib_test.cc 248 249## 10. Authors & Acknowledgment 250 251The tool is based on the DRAM power model developed jointly by the Computer Engineering Research Group at TU Delft and the Electronic Systems Group at TU Eindhoven and verified by the Microelectronic System Design Research Group at TU Kaiserslautern with equivalent circuit-level simulations. This tool has been developed by Karthik Chandrasekar with Yonghui Li under the supervision of Dr. Benny Akesson and Prof. Kees Goossens. The IO and Termination Power measures have been employed from Micron's DRAM Power Calculator. If you decide to use DRAMPower in your research, please cite one of the following references: 252 253**To cite the DRAMPower Tool:** 254``` |
255[1] "DRAMPower: Open-source DRAM power & energy estimation tool" 256Karthik Chandrasekar, Christian Weis, Yonghui Li, Benny Akesson, Norbert Wehn, and Kees Goossens | 255[1] DRAMPower: Open-source DRAM Power & Energy Estimation Tool 256Karthik Chandrasekar, Christian Weis, Yonghui Li, Sven Goossens, Matthias Jung, Omar Naji, Benny Akesson, Norbert Wehn, and Kees Goossens |
257URL: http://www.drampower.info 258``` 259 260**To cite the DRAM power model:** 261``` 262[2] "Improved Power Modeling of DDR SDRAMs" 263Karthik Chandrasekar, Benny Akesson, and Kees Goossens 264In Proc. 14th Euromicro Conference on Digital System Design (DSD), 2011 --- 34 unchanged lines hidden --- | 257URL: http://www.drampower.info 258``` 259 260**To cite the DRAM power model:** 261``` 262[2] "Improved Power Modeling of DDR SDRAMs" 263Karthik Chandrasekar, Benny Akesson, and Kees Goossens 264In Proc. 14th Euromicro Conference on Digital System Design (DSD), 2011 --- 34 unchanged lines hidden --- |