Mesh_XY.py (11666:10d59d546ea2) Mesh_XY.py (13731:67cd980cb20f)
1# Copyright (c) 2010 Advanced Micro Devices, Inc.
2# 2016 Georgia Institute of Technology
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;
9# redistributions in binary form must reproduce the above copyright
10# notice, this list of conditions and the following disclaimer in the
11# documentation and/or other materials provided with the distribution;
12# neither the name of the copyright holders nor the names of its
13# contributors may be used to endorse or promote products derived from
14# this software without specific prior written permission.
15#
16# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28# Authors: Brad Beckmann
29# Tushar Krishna
30
31from m5.params import *
32from m5.objects import *
33
34from BaseTopology import SimpleTopology
35
36# Creates a generic Mesh assuming an equal number of cache
37# and directory controllers.
38# XY routing is enforced (using link weights)
39# to guarantee deadlock freedom.
40
41class Mesh_XY(SimpleTopology):
42 description='Mesh_XY'
43
44 def __init__(self, controllers):
45 self.nodes = controllers
46
47 # Makes a generic mesh
48 # assuming an equal number of cache and directory cntrls
49
50 def makeTopology(self, options, network, IntLink, ExtLink, Router):
51 nodes = self.nodes
52
53 num_routers = options.num_cpus
54 num_rows = options.mesh_rows
55
56 # default values for link latency and router latency.
57 # Can be over-ridden on a per link/router basis
58 link_latency = options.link_latency # used by simple and garnet
59 router_latency = options.router_latency # only used by garnet
60
61
62 # There must be an evenly divisible number of cntrls to routers
63 # Also, obviously the number or rows must be <= the number of routers
64 cntrls_per_router, remainder = divmod(len(nodes), num_routers)
65 assert(num_rows > 0 and num_rows <= num_routers)
66 num_columns = int(num_routers / num_rows)
67 assert(num_columns * num_rows == num_routers)
68
69 # Create the routers in the mesh
70 routers = [Router(router_id=i, latency = router_latency) \
71 for i in range(num_routers)]
72 network.routers = routers
73
74 # link counter to set unique link ids
75 link_count = 0
76
77 # Add all but the remainder nodes to the list of nodes to be uniformly
78 # distributed across the network.
79 network_nodes = []
80 remainder_nodes = []
1# Copyright (c) 2010 Advanced Micro Devices, Inc.
2# 2016 Georgia Institute of Technology
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;
9# redistributions in binary form must reproduce the above copyright
10# notice, this list of conditions and the following disclaimer in the
11# documentation and/or other materials provided with the distribution;
12# neither the name of the copyright holders nor the names of its
13# contributors may be used to endorse or promote products derived from
14# this software without specific prior written permission.
15#
16# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27#
28# Authors: Brad Beckmann
29# Tushar Krishna
30
31from m5.params import *
32from m5.objects import *
33
34from BaseTopology import SimpleTopology
35
36# Creates a generic Mesh assuming an equal number of cache
37# and directory controllers.
38# XY routing is enforced (using link weights)
39# to guarantee deadlock freedom.
40
41class Mesh_XY(SimpleTopology):
42 description='Mesh_XY'
43
44 def __init__(self, controllers):
45 self.nodes = controllers
46
47 # Makes a generic mesh
48 # assuming an equal number of cache and directory cntrls
49
50 def makeTopology(self, options, network, IntLink, ExtLink, Router):
51 nodes = self.nodes
52
53 num_routers = options.num_cpus
54 num_rows = options.mesh_rows
55
56 # default values for link latency and router latency.
57 # Can be over-ridden on a per link/router basis
58 link_latency = options.link_latency # used by simple and garnet
59 router_latency = options.router_latency # only used by garnet
60
61
62 # There must be an evenly divisible number of cntrls to routers
63 # Also, obviously the number or rows must be <= the number of routers
64 cntrls_per_router, remainder = divmod(len(nodes), num_routers)
65 assert(num_rows > 0 and num_rows <= num_routers)
66 num_columns = int(num_routers / num_rows)
67 assert(num_columns * num_rows == num_routers)
68
69 # Create the routers in the mesh
70 routers = [Router(router_id=i, latency = router_latency) \
71 for i in range(num_routers)]
72 network.routers = routers
73
74 # link counter to set unique link ids
75 link_count = 0
76
77 # Add all but the remainder nodes to the list of nodes to be uniformly
78 # distributed across the network.
79 network_nodes = []
80 remainder_nodes = []
81 for node_index in xrange(len(nodes)):
81 for node_index in range(len(nodes)):
82 if node_index < (len(nodes) - remainder):
83 network_nodes.append(nodes[node_index])
84 else:
85 remainder_nodes.append(nodes[node_index])
86
87 # Connect each node to the appropriate router
88 ext_links = []
89 for (i, n) in enumerate(network_nodes):
90 cntrl_level, router_id = divmod(i, num_routers)
91 assert(cntrl_level < cntrls_per_router)
92 ext_links.append(ExtLink(link_id=link_count, ext_node=n,
93 int_node=routers[router_id],
94 latency = link_latency))
95 link_count += 1
96
97 # Connect the remainding nodes to router 0. These should only be
98 # DMA nodes.
99 for (i, node) in enumerate(remainder_nodes):
100 assert(node.type == 'DMA_Controller')
101 assert(i < remainder)
102 ext_links.append(ExtLink(link_id=link_count, ext_node=node,
103 int_node=routers[0],
104 latency = link_latency))
105 link_count += 1
106
107 network.ext_links = ext_links
108
109 # Create the mesh links.
110 int_links = []
111
112 # East output to West input links (weight = 1)
82 if node_index < (len(nodes) - remainder):
83 network_nodes.append(nodes[node_index])
84 else:
85 remainder_nodes.append(nodes[node_index])
86
87 # Connect each node to the appropriate router
88 ext_links = []
89 for (i, n) in enumerate(network_nodes):
90 cntrl_level, router_id = divmod(i, num_routers)
91 assert(cntrl_level < cntrls_per_router)
92 ext_links.append(ExtLink(link_id=link_count, ext_node=n,
93 int_node=routers[router_id],
94 latency = link_latency))
95 link_count += 1
96
97 # Connect the remainding nodes to router 0. These should only be
98 # DMA nodes.
99 for (i, node) in enumerate(remainder_nodes):
100 assert(node.type == 'DMA_Controller')
101 assert(i < remainder)
102 ext_links.append(ExtLink(link_id=link_count, ext_node=node,
103 int_node=routers[0],
104 latency = link_latency))
105 link_count += 1
106
107 network.ext_links = ext_links
108
109 # Create the mesh links.
110 int_links = []
111
112 # East output to West input links (weight = 1)
113 for row in xrange(num_rows):
114 for col in xrange(num_columns):
113 for row in range(num_rows):
114 for col in range(num_columns):
115 if (col + 1 < num_columns):
116 east_out = col + (row * num_columns)
117 west_in = (col + 1) + (row * num_columns)
118 int_links.append(IntLink(link_id=link_count,
119 src_node=routers[east_out],
120 dst_node=routers[west_in],
121 src_outport="East",
122 dst_inport="West",
123 latency = link_latency,
124 weight=1))
125 link_count += 1
126
127 # West output to East input links (weight = 1)
115 if (col + 1 < num_columns):
116 east_out = col + (row * num_columns)
117 west_in = (col + 1) + (row * num_columns)
118 int_links.append(IntLink(link_id=link_count,
119 src_node=routers[east_out],
120 dst_node=routers[west_in],
121 src_outport="East",
122 dst_inport="West",
123 latency = link_latency,
124 weight=1))
125 link_count += 1
126
127 # West output to East input links (weight = 1)
128 for row in xrange(num_rows):
129 for col in xrange(num_columns):
128 for row in range(num_rows):
129 for col in range(num_columns):
130 if (col + 1 < num_columns):
131 east_in = col + (row * num_columns)
132 west_out = (col + 1) + (row * num_columns)
133 int_links.append(IntLink(link_id=link_count,
134 src_node=routers[west_out],
135 dst_node=routers[east_in],
136 src_outport="West",
137 dst_inport="East",
138 latency = link_latency,
139 weight=1))
140 link_count += 1
141
142 # North output to South input links (weight = 2)
130 if (col + 1 < num_columns):
131 east_in = col + (row * num_columns)
132 west_out = (col + 1) + (row * num_columns)
133 int_links.append(IntLink(link_id=link_count,
134 src_node=routers[west_out],
135 dst_node=routers[east_in],
136 src_outport="West",
137 dst_inport="East",
138 latency = link_latency,
139 weight=1))
140 link_count += 1
141
142 # North output to South input links (weight = 2)
143 for col in xrange(num_columns):
144 for row in xrange(num_rows):
143 for col in range(num_columns):
144 for row in range(num_rows):
145 if (row + 1 < num_rows):
146 north_out = col + (row * num_columns)
147 south_in = col + ((row + 1) * num_columns)
148 int_links.append(IntLink(link_id=link_count,
149 src_node=routers[north_out],
150 dst_node=routers[south_in],
151 src_outport="North",
152 dst_inport="South",
153 latency = link_latency,
154 weight=2))
155 link_count += 1
156
157 # South output to North input links (weight = 2)
145 if (row + 1 < num_rows):
146 north_out = col + (row * num_columns)
147 south_in = col + ((row + 1) * num_columns)
148 int_links.append(IntLink(link_id=link_count,
149 src_node=routers[north_out],
150 dst_node=routers[south_in],
151 src_outport="North",
152 dst_inport="South",
153 latency = link_latency,
154 weight=2))
155 link_count += 1
156
157 # South output to North input links (weight = 2)
158 for col in xrange(num_columns):
159 for row in xrange(num_rows):
158 for col in range(num_columns):
159 for row in range(num_rows):
160 if (row + 1 < num_rows):
161 north_in = col + (row * num_columns)
162 south_out = col + ((row + 1) * num_columns)
163 int_links.append(IntLink(link_id=link_count,
164 src_node=routers[south_out],
165 dst_node=routers[north_in],
166 src_outport="South",
167 dst_inport="North",
168 latency = link_latency,
169 weight=2))
170 link_count += 1
171
172
173 network.int_links = int_links
160 if (row + 1 < num_rows):
161 north_in = col + (row * num_columns)
162 south_out = col + ((row + 1) * num_columns)
163 int_links.append(IntLink(link_id=link_count,
164 src_node=routers[south_out],
165 dst_node=routers[north_in],
166 src_outport="South",
167 dst_inport="North",
168 latency = link_latency,
169 weight=2))
170 link_count += 1
171
172
173 network.int_links = int_links