1# Copyright (c) 2010 Advanced Micro Devices, Inc.
2# 2016 Georgia Institute of Technology
3# All rights reserved.
4#
5# Redistribution and use in source and binary forms, with or without
6# modification, are permitted provided that the following conditions are
7# met: redistributions of source code must retain the above copyright
8# notice, this list of conditions and the following disclaimer;

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29# Tushar Krishna
30
31from __future__ import print_function
32from __future__ import absolute_import
33
34from m5.params import *
35from m5.objects import *
36
37from .BaseTopology import SimpleTopology
38
39# Creates a generic Mesh assuming an equal number of cache
40# and directory controllers.
41# XY routing is enforced (using link weights)
42# to guarantee deadlock freedom.
43
44class Mesh_XY(SimpleTopology):

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169 src_outport="South",
170 dst_inport="North",
171 latency = link_latency,
172 weight=2))
173 link_count += 1
174
175
176 network.int_links = int_links